Logic Minimization Using Karnaugh Maps
Brief of the Video:
Learn about 5 and 6 Variable Maps and understand logic minimization with Karnaugh Maps. This lecture is presented by Prof. S. Srinivasan from the Department of Electrical Engineering, IIT Madras.
Lecture videos are linked and streamed with permission from The National Programme on Technology Enhanced Learning (NPTEL), an initiative by seven IITs and the IISs for creating course contents in engineering and science, and funded by the Ministry of Human Resource Development. Copyright to this content is owned and maintained by the institutes participating in the NPTEL.