The editorial advisory board provides expert opinion from members on technology and market trends in the electronics industry and its supporting eco-system, including engineering education and policy. The publication aims for the board to comprise representatives from various segments, offering diversity of industry insight to the editorial team as well as a broad base for content collaboration and planning. The following are the current members.
Dept of Electrical Engineering,
Indian Institute of Technology
Ashok leads the Telecommunications and Computer Networks (TeNeT) group. He received his B. Tech from IIT Kanpur, and his M.S. and Ph.D. from the University of Maine. From 1979 to 1981, he was with Washington State University as assistant professor. Jhunjhunwala is a Fellow of INAE, INSA and NAS, and a member of the Prime Minister's Setup Scientific Advisory Committee.
Ashok was awarded the 1997 Dr. Vikram Sarabhai Research Award, the Shanti Swarup Bhatnagar Award in 1998, the Millennium Medal at Indian Science Congress in 2000, the Padma Shri in 2002, the 2002 H. K. Firodia for "Excellence in Science & Technology," the 2004 Shri Om Prakash Bhasin Foundation Award for Science & Technology, the 2006 Jawaharlal Nehru Birth Centenary Lecture Award by INSA and the 2006 IBM Innovation and Leadership Forum Award by IBM.
Manager - Design Verification,
SmartPlay Technologies India
Gaurav Jalan has close to 10 years of experience in ASIC/SoC verification. He has participated in a number of IP development activities, some of which resulted in patent pending solutions. For EE Times-India, he volunteers as a moderator for EDA
and general electronics design related discussions.
Gaurav was previously with SiRF Technology, Noida where he spent close to five years focusing on SoC/MFR verification. He has also worked with HCL Technologies, Noida and with einfinitus Technologies, a startup at IIT Powai.
Gaurav is B.E. from Nagpur University and M.E. (Microelectronics) from MNIT, Jaipur and PGDBA (Marketing Management) from SCDL, Pune. Gaurav enjoys reading and has started dabbling in writing "particularly technical stuff." He comes from Ajmer, a city he says symbolises secularism with the Khwaja Sahib Dargah and the only Lord Brahma Temple.
Gopi Kumar Bulusu
Sankhya Technologies Pvt. Ltd
Gopi is an expert in distributed computing and embedded systems who holds four U.S. patents. Prior to founding Sankhya in 1996, he was a senior software engineer in the embedded software division of Mentor Graphics Corp., where he in a team that created C++ compilers for Motorola 68k processors. Gopi's work at Mentor resulted in two U.S. patents.
Gopi holds a Master's degree in Computer Science from Arizona State Univesity and a Bachelor's in Computer Science and Engineering from the College of Engineering, Guindy.
Sales Director (India),
Mentor Graphics Corp.
Raghu Panicker is responsible for driving sales, strategic operations, business development and company positioning. He started his career with Semiconductor Complex Ltd in 1991 and worked with Telelogic before joining Mentor Graphics. He has previous experience in R&D and Sales & Marketing.
Raghu has a master's degree in management and a bachelor's in electronics engineering.
Shivananda Koteshwar (Shivoo) works as a Director, PES Group responsible for "The Amaatra Academy", India's first college-preparatory co-educational residential school. Shivoo also works as a full-time Professor in E&C Department in PES School of Engineering and is responsible for VLSI Center of Excellence.
He has more than 16 years of experience in IC Design and EDA. He has worked as a Director, Implementation Group in Synopsys for 11 years. Shivoo has also worked with Intel, Arcus as Design Engineer.
He is the Director Founder of two startups -- Sparsha Learning Technologies Private Limited (DoCircuits) and Purpleframe Technologies Private Limited.
He has a Master's degree in Electrical Engineering from Oregon Graduate Institute, Hillsboro, United States, has completed the Advanced Management Program from IIM Bangalore and is a certified trainer in project management.
Senior VP and General Manager
– RTL Business Unit,
Apache Design Solutions Inc.
Vic joined Apache through the acquisition of Sequence Design, where he served as the President and CEO since 2002.
Vic has over 32 years of experience in the EDA and semiconductor industries, including general manager and VP of Avant!'s Silicon Business Unit, responsible for silicon IP and process modeling tools. Prior to Avant!, he held various engineering and marketing positions in Meta-Software, VLSI, National and Fairchild.
Vic holds an M.S.E.E. degree in Solid State Electronics from the University of Cincinnati and B.Tech (EE) from IIT, Bombay.