Listing 1
Example: JEDEC file

Synario 2.10 Data I/O Corp.
JEDEC file for: P16V8R V 
Created on: Thu Jan 2 02:05:25 1997
GAV16V8 implemented Traffic Light Controller 
* 
QP20* QF2194* QV20* F0* 
 X0* 
NOTE Table of pin names and numbers* 
NOTE PINS CLK:1 N:2 S:3 E:4 W:5 GTS:6 YTS:7 Z1:8 Z2:9 OE:11 
NSG:19* 
NOTE PINS NSY:18 NSR:17 EWG:16 EWY:15 EWR:14 GTT:13 YTT:12* 
L0000 11111110111011111110110111111111* 
L0256 11111101111011111110110111101110* 
L0288 11111101111011111010110111111110* 
L0320 11111110111011111110010111101101* 
L0512 11111110110111111110111011101111* 
L0544 11111110110111111111111011101110* 
L0576 11111101111011110110110111011110* 
L0608 11111110110111111001111011111110* 
L0768 11111110110111111110111011111111* 
L1024 11111110110111111101111011101110* 
L1056 11111110110111111001111011111110* 
L1088 11111110110111111110011011101101* 
L1280 11111110111011111110110111101111* 
L1312 11111110111011111110111111101110* 
L1344 11111111111011111110110111101110* 
L1376 11111101110111111101110111011101* 
L1408 11111110110111110101111011011110* 
L1440 11111101111011111010110111111110* 
L1536 11111101111011111010110111011110* 
L1568 11111110110111111001111011011110* 
L1600 11111101111011111110100111101110* 
L1632 11111110110111111101101011101110* 
L1792 11111101110111111101110111011101* 
L1824 11111110110111111010111011101110* L1856 11111110011011111010110111101110* L1888 11111110111001111010110111101110* L1920 10111010011011111110110111101110* L1952 10111010111001111110110111101110* L1984 11111110110111111110101011101101* L2016 11111110111011111110100111101101* L2048 11111111* L2128 1111111111111111111111111111 ... 1111111111111111111* 
L2193 1* 
V0001 0000000XXNXLLLLLLLLN* 
V0002 C000000XXNXLLHLLLLLN* 
V0003 C000000XXNXLLHLLLLHN* 
V0004 C001000XXNXHLHLLLLHN* 
V0005 C000000XXNXHLHLLLLHN* 
V0006 C000001XXNXLLHLLLHHN* 
V0007 C000001XXNXLLHLLLHLN* 
V0008 C000000XXNXLHHLLLHLN* 
V0009 C000000XXNXLHHLLLHLN* 
V0010 C000010XXNXLLLLLHLLN* 
V0011 C000010XXNXLLLLHHLLN* 
V0012 C000000XXNXHLLLHHLLN* 
V0013 C000000XXNXHLLLHHLLN* 
V0014 C000001XXNXLLLHHHLLN* 
V0015 C000001XXNXLLLHLHLLN* 
V0016 C000000XXNXLHLHLHLLN* 
V0017 C000000XXNXLHLHLHLLN* 
V0018 C000010XXNXLLHLLLLLN* 
V0019 C000010XXNXLLHLLLLHN* 
V0020 C000000XXNXLLHLLLLHN* 
C5AFF* 
DA95



Listing 2
ABEL program for traffic light controller.

MODULE traffic 
TITLE 'GAL16V8 implemented Traffic Light Controller' 
"Special Constants
   x,c,z = .X.,.C.,.Z.;
"Inputs
CLK	pin 1;		// State clock
N,S,E,W	pin 2,3,4,5;	// road sensors
GTS,YTS	pin 6,7;		// Timer inputs
Z1,Z2	pin 8,9;		// Not used
!OE	pin 11;		// Output control 
"Outputs
 NSG	pin 19	istype	'reg,buffer';//North South Green
 NSY	pin 18	istype	'reg,buffer';//North South Yellow
 NSR	pin 17	istype	'reg,buffer';//North South Red
 EWG	pin 16	istype	'reg,buffer';//East West Green
 EWY	pin 15	istype	'reg,buffer';//East West Yellow
 EWR	pin 14	istype	'reg,buffer';//East West Red
 GTT	pin 13	istype	'reg,buffer';//Green timer trigger
 YTT	pin 12	istype	'reg,buffer';//Yellow timer trigger
// Logic for NS green light
 NS_GREEN = !NSR.Q & !NSY.Q & EWR.Q & !EWY.Q; 
 NS_YELLOW = NSY.Q;
 NS_RED = NSR.Q; 
// Logic for EW Green light
 EW_GREEN = !EWR.Q & !EWY.Q & NSR.Q & !NSY.Q; 
 EW_YELLOW = EWY.Q;
 EW_RED = EWR.Q; 
GREEN_TIMER = GTT.Q; 
YELLOW_TIMER = YTT.Q;
"Set Declarations
 TL = [NSR, NSY, EWR, EWY, GTT, YTT]; 
"State Declarations
 " //NS Green
 S0 = [ 0,  0,  1,  0,  0,  0];
 // NS green - wait for yellow timer
 S1 = [ 0,  0,  1,  0,  0,  1];
 // NS yellow - wait yellow time out
 S2 = [ 0,  1,  1,  0,  0,  0];
 // NS yellow - wait for green timer
 S3 = [ 0,  1,  1,  0,  1,  0];
 // EW green - wait for green time out
 S4 = [ 1,  0,  0,  0,  0,  0];
 // EW green - wait for yellow timer
 S5 = [ 1,  0,  0,  0,  0,  1];
 // EW yellow - wait for yellow time out
 S6 = [ 1,  0,  0,  1,  0,  0];
 // EW yellow - wait for green timer
 S7 = [ 1,  0,  0,  1,  1,  0];
 // Power-up state S10 = [ 0,  0,  0,  0,  0,  0];
 S11 = [ 1,  1,  1,  1,  1,  1];
State_Diagram TL 
State S0: if ((E#W)&(!GTS#(!N&!S))) then S1 
 else S0; //NS Green 
State S1: if (YTS) then S2  
 else S1; // NS green - wait for yellow timer 
State S2: if (!YTS) then S3  
 else S2; // NS yellow - wait yellow time out 
State S3: if (GTS) then S4  
 else S3; // NS yellow - wait for green timer 
State S4: if (!GTS) then S5  
 else S4; // EW green - wait for green time out 
State S5: if (YTS) then S6  
 else S5; // EW green - wait for yellow timer 
State S6: if (!YTS) then S7  
 else S6; // EW yellow - wait for yellow time out 
State S7: if (GTS) then S0  
 else S7; // EW yellow - wait for green timer 
// Power up states are force to state S0 
State S10: goto S0;  
State S11: goto S0;
Equations
 NSG := NS_GREEN; // NS green light output equation
 EWG := EW_GREEN; // EW green light output equation 
// Clock inputs are all common
 NSG.CLK = CLK;
 NSY.CLK = CLK;
 NSR.CLK = CLK;
 EWG.CLK = CLK;
 EWY.CLK = CLK;
 EWR.CLK = CLK;
 GTT.CLK = CLK;
 YTT.CLK = CLK;
// Generate test vectors to verify design 
Test_Vectors( 
[C,N,S,E,W,GS,YS,Z1,Z2]->[NG,NY,NR,EG,EY,ER,GT,YT]) 
"Initial/ 
[0,0,0,0,0,0, 0, x, x ]->[0, 0, 0, 0, 0, 0, 0, 0 ]; 
// 2. Power up cycle one 
[c,0,0,0,0,0, 0, x, x ]->[0, 0, 0, 0, 0, 1, 0, 0 ]; 
// 3. Power up cycle two 
[c,0,0,0,0,0, 0, x, x ]->[1, 0, 0, 0, 0, 1, 0, 0 ]; 
// 4. E sensor trip - S0 -> S1 
[c,0,0,1,0,0, 0, x, x ]->[1, 0, 0, 0, 0, 1, 0, 1 ]; 
// 5. E sensor release S1->S1;waiting for yellow timer 
[c,0,0,0,0,0, 0, x, x ]->[1, 0, 0, 0, 0, 1, 0, 1 ]; 
// 6. Yellow timer sensed 
[c,0,0,0,0,0, 1, x, x ]->[1, 1, 0, 0, 0, 1, 0 , 0 ]; 
// 7 NS=Yel;EW=Red-Waiting for Yellow timer to expire    
[c,0,0,0,0,0, 1, x, x ]->[0, 1, 0, 0, 0, 1, 0 , 0 ]; 
// 8. NS=Yelllow; EW=Red - Yellow timer expired 
[c,0,0,0,0,0, 0, x, x ]->[0, 1, 0, 0, 0, 1, 1, 0 ]; 
// 9. Yel timer expired-waiting for Green timer sense 
[c,0,0,0,0,0, 0, x, x ]->[0, 1, 0, 0, 0, 1, 1, 0 ]; 
// 10. NS=Red;EW=Green-waiting Green timer to expire 
[c,0,0,0,0,1, 0, x, x ]->[0, 0, 1, 0, 0, 0, 0 , 0 ]; 
// 11. NS=Red;EW=Green-waiting Green timer time out 
[c,0,0,0,0,1, 0, x, x ]->[0, 0, 1, 1, 0, 0, 0 , 0 ]; 
// 12. NS=Red;EW=Green-Green timer expired- 
//      Yellow timer triggered 
[c,0,0,0,0,0, 0, x, x ]->[0, 0, 1, 1, 0, 0, 0 , 1 ]; 
// 13. NS=Red; EW=Green - waiting for yellow timer 
[c,0,0,0,0,0, 0, x, x ]->[0, 0, 1, 1, 0, 0, 0 , 1 ]; 
// 14. NS=Red; EW=Green - Yellow timer sensed 
[c,0,0,0,0,0, 1, x, x ]->[0, 0, 1, 1, 1, 0, 0 , 0 ]; 
// 15. NS=Red;EW=Yel-Waiting for Yel timer to expire 
[c,0,0,0,0,0, 1, x, x ]->[0, 0, 1, 0, 1, 0, 0 , 0 ]; 
// 16. NS=Red; EW=Yellow - Yellow timer expired 
[c,0,0,0,0,0, 0, x, x ]->[0, 0, 1, 0, 1, 0, 1 , 0 ]; 
// 17. NS=Red;EW=Yellow-waiting for Green timer sense 
[c,0,0,0,0,0, 0, x, x ]->[0, 0, 1, 0, 1, 0, 1 , 0 ]; 
// 18. NS=Blank; EW=RED - Green timer sensed 
[c,0,0,0,0,1, 0, x, x ]->[0, 0, 0, 0, 0, 1, 0 , 0 ]; 
// 19. NS=Green;EW=Red-waiting Green timer time out 
[c,0,0,0,0,1, 0, x, x ]->[1, 0, 0, 0, 0, 1, 0 , 0 ]; 
// 20. NS=Green; EW=Red - waiting East-West traffic 
[c,0,0,0,0,0, 0, x, x ]->[1, 0, 0, 0, 0, 1, 0 , 0 ]; 
END


Listing 3
Source code of JEDEC file translator.

/* -----------------  */ 
/*    JEDEC File translator    */ 
/* ------------------ */ 
void parse_JEDEC(void) 
{ 
int k,i,j; 
char lnum[7]; 
char string_buffer[82]; 
int line_num=0;
 while(!line_ready); // Wait for first
                      line of text 
 while((getstr(string_buffer)!=0) &&
 (line_num != 2048))
 {
  if (string_buffer[0] == 'L')
  {
   i=1; // Set the string buffer index
   j=0; // Zero line string index
   while (string_buffer[i] != ' ')
    lnum[j++] = string_buffer[i++];
    lnum[j] = 0;/*add string terminator*/
   line_num = atoi(lnum);
   if (line_num < 2048)
   {
    AND_mask[line_num] = 0;
    line_num/=32;
    i++;
    while (string_buffer[i] != '*')
    {
     for(k=7; k>-1; k-)
     {
      if (((string_buffer[i] == '0') &&
         (string_buffer[i+1] == '1')) ||
         ((string_buffer[i] =='1') &&
         (string_buffer[i+1] == '0')))
        AND_mask[line_num] |= 1<<k;
      if ((string_buffer[i] == '1') &&
          (string_buffer[i+1] == '0'))
        INVERT_mask[line_num] |=1<<k;
      i+=2;
      if (((string_buffer[i] == '0') &&
     (string_buffer[i+1] == '1')) ||
     ((string_buffer[i] =='1') &&
     (string_buffer[i+1] == '0')))
     AND_mask[line_num] |= 1<< (k+8);
    if ((string_buffer[i] == '1') &&
       (string_buffer[i+1] == '0'))
     INVERT_mask[line_num] |=1<< (k+8);
    i+=2;
   }
  }
 } else
 if (line_num==2048)
 {
   output_invert = 0; /* Clear invert
   buffer */
   i++; /* Skip space character */
   for (j=7; j>-1; j-)
   {
    if (string_buffer[i++] == '1')
     output_invert |= 1<<j;
   }
   output_invert ^= 0xff; /* Invert
   bits */
  }
 }
}



Listing 4
Source code of PLD logic engine.

/* ----------------- */
/*     PLD Logic Engine            */
/* -----------------*/ 
unsigned char PLD( unsigned char
                  in_buffer,
             unsigned char out_buffer)
{ int i,j; 
unsigned int PRODUCT_line; /*Product
                       line counter*/
unsigned int PLD_input; /* Combined
         input and feedback signals */
unsigned char SOP=0; /* Sum of Product 
                 result accumulator */
unsigned char true_flag; /* True SUM 
                         term flag */
 /* Combine input and feedback  */
 PLD_input = (in_buffer|out_buffer <<8);  
 for(i=0; i<8; i++)  /* Output loop
                       counter */ 
 {  for(j=0; j<8; j++)  /* Output 
                    product line loop
  {                 counter */
      true_flag = 0;  /* Clear sum term
                       flag */
     if(AND_mask[j+i*8)])/* Test for
                  zero product line */   
       { /* Invert selected inputs */
       PRODUCT_line = PLD_input ^
        INVERT_mask[j+(i*8)];
        /* Mask input data  */
     PRODUCT_line &= AND_mask[j+(i*8)];
        /* Compare with AND mask */
   if(PRODUCT_line == AND_mask[j+(i*8)])
   {
    SOP |= (1 << (7-i));
    true_flag = 1;
   }
    /* Test for true product line */
   if(true_flag) break;
   }
  }
 } 
 SOP ^= output_invert; /* Invert selected
                        outputs */
 return SOP;       /* Return new outputs */
}