code associated with David Mc Cracken's article "Programming Flash via Background Debug Mode," April 1997, Embedded Systems Programming Listing 1 Demo program. ; MC68340 ASM Source File: BDMFLASH.ASM ; ; Description: 68340 BDM flash memory program demo. Microtec ASM68K syntax. ; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;‹‹‹- CPU INTERNAL ADDRESSING ‹‹‹‹ AMBAR: EQU 0003FF00H ;Permanent address of SIM base address selector in CPU space. ASIM: EQU 00400000H ;Chosen location for SIM in SuperData space. ACS0MASK EQU ASIM+40H ;Address of CS0 address mask register. ACS0BASE EQU ASIM+44H ;Address of CS0 base address register. ;‹‹‹‹‹‹- EXTERNAL MEMORY ‹‹‹‹‹‹‹ ARAM0: EQU 00000000H ;00000000-0007FFFF INITSP: EQU 0007FFFEH AFLASH: EQU 00200000H ;00200000-0021FFFF FLASHMASK: EQU 0001FFFDH ;LSnibbble: D=int DSACK, 3=ext. ; AM31-AM8 = 0000.0000.0000.0001.1111.1111 = A16-A8 = X. ; AM7-4 = 1111 = mask all function code bits (enables all space access). ; AM3-0 = xx11 = external DSACK. ; AM3-0 = 1101 = internal 16-bit DSACK (b1,0=01) with 3 waits (b3,2=11). FLASHBASE: EQU AFLASH+53H ; AM7-4 = 5 selects SDATA but ignored because of mask FCM3-0 (bits (7-4). ; AM3-0 = 0011 = R/W, not fast term, not CPU space, valid. CODEOFFSET: EQU 400H ;Reserve space for vector table. ;‹‹‹‹- EXTERNAL PERIPHERALS ‹‹‹‹‹ ADRLED: EQU 600011H ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ORG ARAM0 BRA PROGDEMO ;Begin here to write to flash, else at STARTUP. STARTUP: MOVE.L #7,D0 MOVEC.L D0,DFC ;Set destination access to CPU memory space. MOVEA.L #AMBAR,A0 MOVE.L #ASIM+1,D0 MOVES.L D0,(A0) ;Set base address of System Integration Module and enable addressing. MOVE.L #5,D0 MOVEC.L D0,DFC ;Set access back to Supervisor Data Memory. MOVE.L #FLASHMASK,ACS0MASK ;Set up flash access CS0. MOVE.L #FLASHBASE,ACS0BASE ;Enable CS0 decoding. ;Now full system address decoding is possible‹ vector table is in RAM0. ‹‹‹‹‹‹ Demo Program ‹‹‹‹‹‹‹‹‹- ; Continuous down counter display. COUNTDISPLAY: MOVEA.L #ADRLED,A0 DISPLAY: MOVE.L #9,D0 PATTERN: MOVE.B LEDPATTERN(PC,D0.L),D1 MOVE.B D1,(A0) MOVE.L #400000,D1 DELAY: SUBQ.L #1,D1 BNE DELAY SUBQ.W #1,D0 BGE PATTERN BRA DISPLAY LEDPATTERN: DC.B 40H,0F9H,24H,30H,19H,12H,2,78H,0,18H ;²0123456789² ;‹‹‹‹ End of Demo Program ‹‹‹‹‹‹‹‹ ;‹‹‹‹‹- PROGDEMO ‹‹‹‹‹‹‹‹‹‹‹ ; PROGDEMO copies the program in RAM at address STARTUP to flash at address ; CODEOFFSET (offset from base address of flash). PROGDEMO: LEA.L INITSP,SP ; Initialize SP to allow call to GATEFLASH LEA.L STARTUP,A0 ; Point to code source in RAM. LEA.L AFLASH+CODEOFFSET,A1 ; Point to destination in flash memory. MOVE.L #PROGDEMO-STARTUP+1,D0 ; Number of bytes in code. BSR PROGFLASH ; Write the restart PC and SP values to the first two exception vectors. BSR GATEFLASH ; The write-protect gate has to be opened again. MOVE.L #ARAM0+7FFF0H,AFLASH ;Initial SP‹ Not valid until full addressing is enabled. MOVE.L #AFLASH+CODEOFFSET,AFLASH+4 ;Initial PC BRA * ; Idle until BDM debugger interrupts or breakpoint. ;‹‹‹‹‹‹‹‹‹‹‹‹‹‹‹‹‹‹‹‹‹‹‹ ; PROGFLASH ; Program flash memory by copying a block of data from source (in RAM or flash) ; to flash. Both source and destination must be even addresses. ; ; INPUTS: ; A0.L = Source begin address (in DRAM but could be flash). ; A1.L = Destination begin address (in flash). ; D0.L = Length in bytes. ; RETURNS nothing. ; ; The process is: ; ‹ Convert byte count to word count. ; ‹ Compute first segment length to terminate at or before the end of the ; first sector. Sectors comprise 256 bytes (128 words). The first length is ; the distance from the destination begin address to the next 256 byte ; boundary. Byte count = 256 - destination address mod 256. ; ‹ Program each sector of the flash until all of the source words are ; exhausted. Each sector requires call to GATEFLASH to open the devices. ; The last sector is programmed only with as many words as specified in the ; length argument in order to avoid possible source memory bus error due to ; an attempt to read non-existant memory. ; ;................................. PROGFLASH ADDQ.L #1,D0 LSR.L #1,D0 ; Convert byte to word count, rounding up. ; Calculate first transfer count to end on first sector boundary above ; destination begin address. MOVE.L A1,D1 ; Get working copy of destination address. ANDI.L #$FF,D1 ; Address mode 256 NEG.L D1 ADDI.L #$100,D1 ; Byte count = 256 - address mod 256. LSR.L #1,D1 ; Convert to word count. WRITESECTOR ; D0 = total remaining word count. D1 = sector word count. ; A1 = destination. A0 = source. CMP.L D1,D0 ; Compare remaining word count to proposed sector count. BGE COUNTRDY ; Use proposed sector count if <= remaining count. MOVE.L D0,D1 ; Else, use remaining count. COUNTRDY SUB.L D1,D0 BSR GATEFLASH ; Open flash for writing. WRITEWORD MOVE.W (A0)+,(A1)+ ; Copy one word to flash. SUBQ.L #1,D1 BNE WRITEWORD ; Wait for the flash devices to program the sector. MOVE.W -2(A0),D3 ; Read last source word. WAITPROG MOVE.W -2(A1),D1 ; Get current last destination word. CMP.W D3,D1 ; Both devices complement their d7 until done. BNE WAITPROG source = destination. MOVE.L #128,D1 ; Assume next sector is full. CMPI.L #0,D0 BNE WRITESECTOR RTS ;‹‹‹‹- GATEFLASH ‹‹‹‹‹‹‹‹‹‹‹ ; GATEFLASH enables software flash write protection when first executed ; and opens the gate on subsequent execution. ; The gate stays open for 150 usec and then closes unless the flash is ; written to. Only one sector (128 * 2 bytes) at a time can be written. ; After writing stops, the flash begins its self-program cycle. GATEFLASH: MOVE.W #0AAAAH,(AFLASH+5555H*2).L ;AA->5555 in high and low devices. MOVE.W #5555H,(AFLASH+2AAAH*2).L ;55->2AAA ³ MOVE.W #0A0A0H,(AFLASH+5555H*2).L ;A0->5555 ³ RTS ;Write is now enabled until timeout (150usec). END ______________________________________________________________ Listing 2 Debugger startup macro. rem STARTUP.ICD rem P&E 68340 BDM (ICD32) debugger startup macro. SYMBOL ADRMBAR 0003FF00 SYMBOL ADRSIM 00400000 rem ADRSIM in MBAR is 00400xxx SYMBOL VALMBAR 00400001 SYMBOL ADRCS0MASK 00400040 SYMBOL ADRCS0BASE 00400044 rem Configure CS0 to use full decoding with flash at 00200000-21FFFF (64K*16). SYMBOL ADRFLASH 00200000 rem Flash base address 002000xx SYMBOL FLASHMASK 0001FFFD rem LSnibbble: D=int DSACK, 3=ext. rem AM31-AM8 = 0000.0000.0000.0001.1111.1111 = A16-A8 = X. rem AM7-4 = 1111 = mask all function code bits (enables all space access). rem AM3-0 = xx11 = external DSACK. rem AM3-0 = 1101 = internal 16-bit DSACK (b1,0=01) with 3 waits (b3,2=11). SYMBOL FLASHBASE 00200053 rem AM7-4 = 5 selects SDATA but ignored because of mask FCM3-0 (bits (7-4). rem AM3-0 = 0011 = R/W, not fast term, not CPU space, valid. DEBUGGER_DFC 7 rem Set destination to CPU addr space. MM.L ADRMBAR VALMBAR rem Set sim base address and enable. DEBUGGER_DFC 5 rem Set destination to Supervisor Data. rem Configure CS0 base and mask registers. MM.L ADRCS0MASK FLASHMASK MM.L ADRCS0BASE FLASHBASE MDF6 ADRSIM rem Display sim block in F6 window. MDF3 ADRFLASH rem Display flash in F3 window. LOAD BDMFLASH.S rem Load the flash program and counter demo.