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Exploring Embedded DisplayPort

Posted: 18 May 2016     Print Version  Bookmark and Share

Keywords:the Video Electronics Standards Association  VESA  Embedded DisplayPort  eDP  LVDS 

What's new in eDP 1.4b
With so many new enhancements in eDP v1.4 and eDP v1.4a, OEMs developing the eDP v1.4 products later discovered some vagueness and ambiguities in this committee-generated standard, as well as a few conflicts with DisplayPort v1.3. eDP v1.4b began as an effort to update the standard with clarifications and corrections agreed upon within VESA, to promote interoperability among member companies, and to minimize time to market. But eDP v1.4b also ended up incorporating a few other agreed-upon enhancements proposed by some of the member companies involved.

In particular, the selective update feature for panel self-refresh received many refinements and clarifications in protocol. Selectable granularity for the update region was also added to help reduce the complexity of the internal frame buffer storage. Many panel timing controllers use image compression, including DSC, for frame buffer storage. Limiting the X and Y axis granularity of the update region simplifies the compression codec implementation and lowers BOM cost.

The AUX Frame Sync requirement was also eliminated for PSR2 if selective updates are not used, meaning that frame buffer updates are made a full frame at a time. This eliminates the need to support both the DisplayPort GTC (Global Time Code) and AUX Frame Sync features, allowing more scalability of the PSR2 function. Cost can be reduced in exchange for a little less power savings. For MSO, additional cyclic redundancy check (CRC) registers were added to enable the verification of data integrity for the transport of video to each panel segment, up to the four display segments allowed.

Other small adjustments to eDP v1.4b include the removal of a few control register conflicts with DisplayPort v1.3 and clarification and refinement of other various protocols and operational sequences. With this final cleanup, the VESA members generally agreed that eDP v1.4b is the final release of the eDP v1.4 standard and that it is ready for production.

Made possible with DisplayPort
The ongoing enhancements to eDP v1.4b have been made possible by the flexible nature of DisplayPort. DisplayPort is highly extensible and includes the ability to remain backward compatible. An extensive register set is implemented in the sink (display) device to support both new and old features, and other registers indicate device status and allow control by the source. Data packets in the high-speed video interface include pixel data and other various control data. The VESA member companies developing the eDP ecosystem have added the special features described in this article using these DisplayPort features. This will continue, and there is already discussion about a future eDP v1.5 that will utilize the features of DisplayPort v1.4, recently published in February 2016.

Key features carried over from DisplayPort v1.4 will include FEC (Forward Error Correction) for the video link, which is important when employing video compression using DSC. FEC addresses data errors, which in an uncompressed image can result in an unnoticeable change of a single pixel, but with compression can result in a visible change across a whole block of pixels from a single error. Another feature brought over from DisplayPort v1.4 will be the ability to carry High Dynamic Range (HDR) metadata, allowing eDP to serve as an embedded interface for HDR-enabled displays. This will include support for the current HDR10 standard used in Blu-ray and HDMI 2.0b, and future support for more advanced HDR formats that will use extended metadata. However, until the publication of eDP 1.5, the VESA eDP v1.4b Standard will serve as the governing specification for embedded displays within PCs and other devices over the next few years.

It's important to emphasize that successful implementation and adoption of standards like DisplayPort and eDP would not be possible without the cooperative efforts of the more than 230 VESA members across the electronics supply chain. All VESA members have equal access to all work groups, proposals, and draft specifications. Typically, the organization holds about 10 different work group meetings per week, covering various VESA standards, and has two or more PlugTests per year open to all members. By participating in this manner, member companies – ranging from software, chip and display makers to consumer, communication and computing product OEMs – are able to better understand each other's concerns and challenges, facilitating mutually beneficial development efforts.

About the author
Craig Wiley has over 35 years in the semiconductor industry focused on analog, mixed-signal, video, and video interfaces primarily in the realm of applications and technical marketing. He serves as the main editor for the VESA Embedded DisplayPort Standard, and contributor to the DisplayPort Standard since 2007. He also serves on VESA Board of Directors, and served as Board Chair during 2011-2013. He is the leader of VESA Marketing Task Group, and DisplayPort on USB-C subgroup

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