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Tranceiver supports 25Gbit per lane copper cabling at 5m

Posted: 04 Feb 2016     Print Version  Bookmark and Share

Keywords:Xilinx  data centre  interconnect  server  FPGA 

Xilinx Inc. has revealed what it says is a transceiver technology breakthrough to deliver greater cost efficiency to data centre interconnects. Its Virtex UltraScale devices have achieved compliance to the 25GE, 50GE and 100GE copper cable and backplane IEEE and related specifications that supports up to 5m of copper cabling in the data centre and up to 1m of backplane interconnect.

These specifications include the IEEE 802.3bj 100GBASE-CR4/KR4, IEEE 802.3by 25GBASE-CR/CR-S/KR/KR-S and 25Gbit Ethernet Consortium 50GBASE-CR2/KR2. Data centre customers can now leverage nx25G lanes of copper cabling versus optics for more cost and power-optimised solutions to connect servers to top-of-rack switches using any off-the-shelf, specification-compliant vendor.

Xilinx transceiver technology promises to deliver remarkable signal quality and auto-adaptive equalisation to ensure the highest signal integrity and fastest serial link implementation. Along with integrated 100G Ethernet MAC IP, soft error-correction (RS-FEC) IP, and ASIC-class logic fabric, Virtex UltraScale FPGAs provide a complete, high performance and low-latency Ethernet solution for data centre workload acceleration.





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