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Exploring voltage-aware DRC

Posted: 12 Jan 2016     Print Version  Bookmark and Share

Keywords:design rule checking  DRC  voltage-aware  PERC tool  debugging 

Metal spacing rules are typically defined in the design rule checking (DRC) sign-off deck, and are purely geometric. This has been a fact for, well, forever, known to even the most novice verification engineer.

Now though, the more advanced nodes have brought with them a new kind of spacing check, called voltage-aware DRC (VA-DRC).

What does this term mean, and what new challenges does it bring to the DRC task?

With VA-DRC, designs must comply with complex spacing rules that require variable spacings based on either the operating voltages, or the difference in voltages between lines running next to each other.

Because voltage controls these metal spacing rules, designers can no longer apply just one spacing rule per metal layer. However, using traditional verification tools, the challenge is obtaining the voltage information on the nets quickly and accurately so the designers can apply the appropriate spacing rule.

Let's talk briefly about these voltage definition challenges.

The well-known method is to add markers with the voltage value to the layout. These markers can be text layers or polygons. However, markers are a manual process, and as such, they are both time-consuming and subject to human error.

Additionally, the complexity of the voltage-aware rules intensifies the necessity of accurately defining voltages in a layout. Checking errors that are introduced during DRC because of improper rule coding or erroneous voltage markers can generate hundreds of errors that must be analysed and debugged.

False DRC violations will then need to be waived by the designer, which introduces even more overhead. Also, inaccurately marked layouts can result in substandard routing optimisations if the router uses a general worst case rules, rather than rules based on the actual voltages present on various nets of the layout.

The best way to address VA-DRC challenges is through an automated flow that can propagate realistic voltage values to all points in the layout, eliminating the more fallible manual process (figure 1). This VA-DRC flow should not require any changes to sign-off decks, and it should generate the voltage information automatically, without requiring the designer to manually add any physical layout markers.

Figure 1: Automated VA-DRC flow.

This type of automated flow for performing VA-DRC can be established based on a tool like the Calibre PERC reliability solution.

Figure 2: Automated VA-DRC using the Calibre PERC tool.

The Calibre PERC flow (figure 2) first identifies the supply voltages for the design, and then uses a voltage propagation algorithm to determine the voltages on internal layout nodes. Voltages are computed automatically based on static propagation rules, which can be user-defined for specific device types. The algorithm is applied to the netlist to identify target nets and devices needed for VA-DRC.

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