Global Sources
EE Times-India
EE Times-India > EDA/IP

SoC vs. SiP: Highlighting the changing mobile, IoT space

Posted: 13 Oct 2015     Print Version  Bookmark and Share

Keywords:SoC  SiP  IoT  wearable  big data 

Time-to-market has become more critical than ever, and this can pose a challenge for SoCs, given the extended design lead times that are incurred as technology moves to advanced nodes. For example, it is suggested that lead times extend 4x from 28nm to 14/16mn. In addition, with the escalating costs related to development, design, masks and tooling, the economics for designing a new SoC into the next advanced node is serious business and requires deep technical consideration. It is therefore clear that the need for alternative heterogeneous integration paths vs. SoC has never been so apparent. SiP is the way forward.

According to the ASE Group, SiP can be defined as "a package or module that contains a functional electronic system or subsystem that is integrated and miniaturized through IC assembly technologies." Essentially, the subsystems are made up of individual dies that are manufactured separately, each using its own most cost-effective node. For example, the ASIC (an SoC) could be in one technology node, additional memories in different nodes, peripherals in still another node, together with discrete and integrated passives, MEMS and different sensors. These components can be successfully assembled inside the package through a variety of established techniques, perhaps together with other features such as antennas and shielding, in existing high-volume manufacturing infrastructures.

SoC vs. SiP

Compared to SoC technologies, SiP is still in its early stages. Here, new partnerships and collaboration, IP development, design tools and turn-key-business-ownership must continue to evolve to enable integration of next-generation electronics into the fabric of the global market and society. There are many compelling industry dynamics driving SiP adoption within mainstream semiconductor manufacturing. Chief among these are the rapid development and implementation of new and innovative IoT and mobile products requiring heterogeneous components and affordable development costs, as well as the creation of differentiated platform solutions through system integration and optimisation.

Some leading players within the outsourced assembly and test (OSAT) community are moving beyond their established core competencies and are positioning themselves to serve the industry's SiP needs through leveraging advanced IC packaging technologies to enable new generations of miniaturised electronic systems. Recent developments in advanced packaging technologies, wafer level packaging, fanout chip-first and chip-last, embedding packaging, TSV 2.5D and flip chip re-invention, have great potential for addressing a broad spectrum of SiP applications. Through established expertise in core competencies, IC packaging technology enables highly integrated and miniaturised modular products. In addition, it is crucial to understand the different market segments and to provide SiP co-design and co-development services to support OEM product roadmap execution in these segments. With this understanding, it is possible to deliver rapidly scalable, high-quality, high-precision and cost-effective SiP manufacturing capacity.

 First Page Previous Page 1 • 2 • 3 Next Page Last Page

Comment on "SoC vs. SiP: Highlighting the changi..."
*  You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.


Go to top             Connect on Facebook      Follow us on Twitter      Follow us on Orkut

Back to Top