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ARM-based chips based on Marvell's MoChi, FLC architecture

Posted: 09 Oct 2015     Print Version  Bookmark and Share

Keywords:Marvell  ARM Cortex  MoChi  FLC  WiFi 

Marvell has announced what it describes as its high performance, hyper-scale Marvell AP806 and ARMADA A3700 chips, the company's flagship 64bit ARM Powered products based on its MoChi architecture. The AP806 incorporates Marvell's Final-Level Cache (FLC) architecture, and is geared as a virtual system-on-chip (Marvell VSoC) with multiple storage and networking companion modules.

The AP806 is an ARM Cortex-A72 based SoC and promises to easily and seamlessly connect to other Marvell MoChi modules creating a Virtual SoC that enables lower system cost, simpler board design and faster time-to-market. The MoChi architecture offers developers and engineers the flexibility to build solutions based on their individual needs, added the company.

The ARMADA A3700 is a dual and single Cortex-A53 based chip integrated with a mix of networking and storage IPs that can be expanded with additional MoChi modules for connectivity and offload options such as packet processor offloads, WiFi, BLE, ZigBee, USB, SATA, etc. The chip addresses cloud-distributed storage, networking management, home and small office/home office (SOHO) routers and storage solutions, and battery-powered IoT devices.

MoChi applications

The MoChi architecture was designed to address the challenges of producing single-die SoCs, which have historically provided steep cost advantages through integration but have now reached a limit whereby the cost per transistor cannot linearly be improved. Implementing MoChi architecture in the AP806 and ARMADA A3700 provides an optimised process selection per MoChi building block while reducing the software investment for a single architecture, and allows for countless configurations and shorter time-to-market, stated Marvell. A key element to the MoChi architecture is Marvell's second generation Aurora2 coherent interconnect technology. This high-speed, high-bandwidth interconnect effectively ties together the CPU clusters and the MCi interfaces for coherent, high-performance traffic. The AP806 also builds on Marvell's FLC technology, which claims to reduce the amount of DRAM main memory needed in a system and replaces it with a small layer of high-speed DRAM cache and an inexpensive solid-state drive (SSD) main memory, providing significant cost and power savings.

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