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Embedded software assumes power management responsibility

Posted: 01 Sep 2015     Print Version  Bookmark and Share

Keywords:Power consumption  RTOS  CPU  software  hardware 

Power consumption by embedded devices is a key issue. There is always a need to extend battery life and/or reduce the environmental impact of a system. Historically, this was purely a hardware issue, but those days are past. In modern embedded systems software takes an increasing responsibility for power management. This article reviews how power management is achieved while a device is operating and looks at the techniques employed to minimise power consumption when a device is inactive.

There are broadly two contexts in which a device's power consumption may be considered: when it is in use and when it is idle. In the former, active power management is the key requirement; in the latter, the deployment of low power CPU modes may be advantageous.

Software power management
During use, there are a couple of measures that software can take to keep power consumption to a minimum:

 • Switch off peripherals when they are not in use.
 • Adjust the frequency and voltage of the CPU according to the current performance requirements (this is "Dynamic Voltage and Frequency Scaling"—DVFS).

Peripheral power-down
It is quite obvious that the best way to save energy with any electrical or electronic device is to simply switch it off. So, it is logical to design electronic systems so that peripherals and sub-systems may be switched on and off by the software, as required.

This facility is not as simple as it sounds, as some types of peripheral – like a network interface, for example – take a period of time to configure when they are switched on. This delay may be unacceptable if the peripheral is constantly switched on and off. There are also situations where a peripheral may continue transferring (sending or receiving) data after the CPU (i.e. the software) has finished addressing it; a premature power down would result in data loss. Of course, these are all details that would be accommodated in a power-aware device driver.

Dynamic voltage and frequency scaling
To a software engineer, it is not immediately obvious how CPU voltage and clock frequency affect power consumption. Broadly speaking, the lower the frequency of operation, the lower the power consumption. This can be thought of in terms of how much "work" a given piece of software can do. For example, imagine that a CPU needs to execute 100,000 instructions of some software to get a job done and this needs to be performed every second. If the CPU were running at a clock frequency that enabled it to execute a million instructions per second, it would be capable of doing 10X the amount of required work. So, lowering the frequency of the clock by this amount [to facilitate 100K instructions per second] matches performance to requirements and optimises power consumption.

Low power modes
When a device is not in use, it may be switched off entirely. This requires little in the way of software support, though some devices might need some status information saved on power down. The only problem is that a fully powered down device may take some time to start up. Even with a lightweight RTOS, modern large applications can take many seconds to boot. The alternative to power down is some kind of sleep mode.

We are all familiar with the two sleep modes used by most laptops:

Standby: The CPU and peripherals are shut down, but power is maintained to RAM. This mode has the advantage that wake-up is very fast, but the downside is that power continues to be drawn, so there is a limit on how long a device can be in standby.

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