Startup announces non-volatile FPGAs

Gowin Semiconductor Corp., a startup based in China, has developed a line-up of non-volatile FPGAs. The portfolio includes two FPGAs implemented in 55nm embedded flash process from TSMC: the GW1N-1K and the GW1N-9K with the corresponding approximate number of lookup tables (LUTs) per device.

Gowin also provides the GW2A SRAM based family with complexity up to 50,000 LUTs and lists on its website the GW3S family covering complexity up to about 100,000 LUTs.

As well as being non-volatile in operation the GW1N family offers access to a flash memory block either for user logic or as NOR flash memory. The process offers 10 years data retention and 10^5 endurance cycling.

GW1N devices also provide up to 198K embedded block SRAM bits and nearly 20K Shadow SRAM bits; up to two million user flash memory bits; up to 20 dedicated 18x18 multipliers and accumulators; up to 276 I/O pads which include 44 true LVDS output. It also support PLL and DLL applications, the company said.

"Non-volatile FPGAs are very popular in areas such as consumer electronics, industry control, automobile industry, etc. These fields are very competitive and important to many FPGA vendors today," said Jason Zhu, CTO of Gowin.

The front-end of the Gowin design flow is supported by the Synplify product from Synopsys. The back end is support by dedicated Gowin design tools. The combination takes design from HDL/RTL down to the bit-stream data file.

GW1N specifications. (Source: Gowin Semiconductor)

Engineering samples and evaluation boards are expected to be available in 4Q15. The company did not provide pricing information.

- Peter Clarke
  EE Times Europe