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Forthcoming Intel server to use 3D Crosspoint memory chips

Posted: 17 Aug 2015     Print Version  Bookmark and Share

Keywords:Intel  memory  DDR4  DRAM  server 

Intel Corp. will soon reveal what it describes as a way to boost server performance using the memory chips it announced in late July with Micron. The approach packs up to four times more main memory in a server with 50 per cent greater memory bandwidth opening a door to real-time analytics, but it uses proprietary extensions to a DDR4 bus, according to one expert.

The approach would be "a huge change to the way computing is done" based on persistent memory, said Dave Eggleston, a former memory-chip designer who said he is speculating based on public sources in a standing-room-only talk at the Flash Memory Summit.

"The bottom line for me is I love the technology, and I hate the business model," he said, referring to the proprietary memory bus he expects Intel will introduce with its Purley servers that will ship in 2017.

"This is sole-sourced, so if you are a big server maker you should be worried about this because you will pay Intel for both the processor and memory that will be bundled and not cheap," said Eggleston who was CEO at Unity Semiconductor, a developer of resistive RAM chips.

The Purley servers will include dual in-line memory modules using the 3D Crosspoint memories Intel and Micron announced. Eggleston speculated the parts will be priced at about $4/GB or about half the price of DDR4 DRAMs.

Purley servers

The yellow and green Apache Pass DIMMs on the SkyLake-based Purley servers above are said to use 3D Crosspoint memory chips.

Slides such as the one above have emerged on the Web about the Purley servers using Intel's SkyLake processors. However, Eggleston's speculation about them using Crosspoint memories is new.

Intel is expected to announce the products at its annual developer forum next week. Intel declined to comment on this story.

The large quantities of persistent memory significantly speed up computing when so close to the processor. That's because in part they will catch DRAM cache misses that ordinarily force the CPU to wait for access to storage in a solid-state or hard drive.

Apache Pass is the Intel code-name for the new DIMMS that have been previously reported online. Eggleston speculates they use an enhanced protocol to manage non-deterministic data in the Crosspoint memory chips.

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