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RISC or CISC: Does it matter?

Posted: 16 Jul 2015     Print Version  Bookmark and Share

Keywords:RISC  CISC  processor  microarchitecture  CPU 

This study confined its comparisons to those implementations of the Cortex-A8 or higher, with little focus on any of the Cortex-M devices. "The reason for this is simple: one of our goals was to have platforms we could compare and quantify," he said. "There is no way to do that below the A9, in terms of competitive architectures." In the Cortex-M0 environment, where ARM is competing with 8bit MCUs over the 1-20MHz and 2-50 mWatts range, the operating overheads of the X86 instruction set makes that untenable.

The team's evaluations were performed on one MIPS implementation (Loongson), three ARM platforms (Cortex- A8, Cortex-A9, and Cortex-A15), and three x86-based designs (Atom, Bobcat, and Sandybridge i7). They also used the same operating system, Linux 2.6 LTS (but 2.8 on the A5) and the same gss 4.4-based cross compiler front end. For mobile client workloads, they used the CoreMark and Webkit benchmarks. For desktop apps, SPECCPU2006 was used, while server benchmark workloads used included lightpd and CLucerne.

The implementations span diverse ISAs and within each ISA, diverse microarchitectures. "Overall, our choice of platforms provides a reasonably equal footing, and we performed detailed analysis to isolate out microarchitecture and technology effects, "said Sankaralingam. The VRG team did performance comparisons of the processors in terms of execution time, cycle count, instruction count, instruction format and mix, microarchitecture and ISA influence on microarchitecture. Power and energy analysis measurements were also extensive: average power, average technology independent power, and average energy, among others.

According to Sankaralingam, the takeaway on this report is that although ISA is relevant to power and performance by virtue of support for various specialisations (virtualisation, accelerators, floating point arithmetic, etc.), whether the ISA is RISC or CISC is largely irrelevant for today's mature microprocessor design world.

"Based on this study, developers can safely consider ARM, MIPS, and x86 processors simply as engineering design points optimised for different levels of performance," he said. "There's nothing fundamentally more energy-efficient in one ISA class versus another."

In the concluding paragraph of the report, the authors write: "It appears that decades of hardware and compiler research has enabled efficient handling of both RISC and CISC ISAs, and both are equally positioned for the coming years of energy-constrained innovation."

While Sankaralingam thinks the VRG team developed an exhaustive and rigorous methodology for its study he said "there are many ways to analyse the data." So for those interested in doing their own analysis, the raw data for the study can be downloaded from the University of Wisconsin VTG web page.

You can also download "ISA Wars: Understanding the Relevance of ISA being CISC or RISC" at the Association of Computing Machinery web site. Even if you are not a member of the Association of Computing Machinery, and so have to pay a fee to download the paper, it is worth the one-time price.

About the author
Bernard Cole is the Editor of the EE Times' Microcontroller and Printed Circuit Board Designlines.


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