Mentor brings emulation beyond functional testing

"This new application would have been difficult to develop prior to the launch of Veloce OS3 in April last year, and it will certainly take some time for our competitors to catch up," noted Selosse, "but I wouldn't be surprised if Cadence announced something similar soon as this is what generally the industry has been asking for."

According to Selosse, emulators have become real competitiveness tools for large chip designers, and despite the shrinking number of very large chip designs, emulators are increasingly in demand because they are the only way to truly ensure full design functionality.

"Contrarily to many analysts' predictions, the cloud is not threatening the emulation market, because even large server farms fall short of the performance of a dedicated machine. Today's emulators are about a thousand time more performant than typical servers, for some designs this can mean two to three days of runtime versus several months on a cloud-based server farm," commented Selosse.

"What's more, although everyone is talking about the cloud, most chip designers are too concerned about IP security to let anything go to the cloud. They'll share their emulators internally, over private networks or implement their own private cloud of emulators."

In view of these new developments, something far out on the roadmap would be to close the loop and directly feedback the emulation's power analysis into a RTL power optimisation tool at chip design level. For now, all the early trade-off and exploration would have to be done manually, going back and forth between the tools, but customers are asking for further integration and this is something Mentor is also looking at.

- Julien Happich
  EE Times Europe

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