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Broaden the functionality of FPGA-based prototypes

Posted: 13 Mar 2015     Print Version  Bookmark and Share

Keywords:FPGAs  ASIC  SoC  prototype  partitioning 

In this article, we will have a look at some recent functionality that is now available with the most sophisticated prototyping platforms.

Power to spare
It wasn't all that long ago that FPGA-based prototypes were the sole province of hardware designers and lab technicians. Viewed as finicky boards covered with rows of devices and bristling with cables, they were relegated to back rooms where engineers would endlessly tinker with them in a desperate effort to bring up designs of limited size and complexity.

No more. Today's FPGA prototypes represent muscular platforms for developing ultra-large systems running at blistering speeds. With this kind of power, these systems are used for a wide range of tasks, including design integration, system verification, and software development.

This solution is well-suited to designs fully rendered in RTL that can be mapped to an FPGA. But what about cases where portions of the design are still only available as behavioral models in descriptions such as C++ or SystemC?

FPGA-based prototypes to the rescue... again
The latest systems now provide transaction-level interfaces—often referred to as "transactors"—that bridge the abstraction level between behavioral models and live hardware. Transactors offer a way to communicate between software running on a host machine and an FPGA-based prototyping platform that often includes memories, processors, and high-speed interfaces.

Figure 1: Transactors offer a way to communicate between software running on a host machine and an FPGA-based prototyping platform

One example of this is the ProtoBridge system from S2C, which supplies a transactor interface between a software program and the world of AXI-compliant hardware. There are two key parts to this: an AXI-to-PCIe bridge that connects to a host computer, and a C-API that communicates to the design through the bridge. The software-to-AXI transactor offers new flexibility to designers building ARM-based systems. Also, coupling this to a PCIe interface supporting transfer speeds up to 500 megabytes/second provides a perfect development platform for data-intensive applications.

A Cornucopia of Applications
A system like this allows designers to maximize the benefits of FPGA-based prototypes much earlier in the design project for algorithm validation, IP design, simulation acceleration, and corner case testing. A prototype combined with a transactor interface makes a range of interesting applications possible throughout the design flow:

Algorithm/architecture exploration: When a new system is developed, behavioral models are created to explore different algorithms and architectures. But new systems are typically built upon the foundation of existing IP, often available in RTL. A transactor interface allows behavioral models to be co-simulated with RTL models, thereby exercising the full system regardless of the abstraction level or language used to define the different blocks.

Early software development: The ability to run software at the earliest stage possible is becoming more important. It may be hard to access all the high-level models needed to implement a virtual platform capable of running software. Utilizing an FPGA with a transaction-level link to an electronic system level (ESL) design environment offers an effective solution. Tying together the programmer's development environment with the target platform from the hardware team allows the software to be developed earlier in the design cycle, and provides a way for each group to validate their changes against the work of the other team.

Figure 2: Software development.

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