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Xilinx's 20nm FPGA offers highest DSP

Posted: 06 Nov 2014     Print Version  Bookmark and Share

Keywords:FPGA  DSP  FEC  CRC 

Augmenting its 20nm portfolio, Xilinx Inc. has introduced the Kintex UltraScale KU115 FPGA. Touted as the flagship of the Kintex UltraScale family, the KU115 provides the highest DSP count available in a single programmable device. This product aims at data centre compute acceleration and signal processing applications including video and medical imaging, broadcast systems and radar.

The KU115 FPGA is optimised for a full range of DSP-intensive operations ranging from floating point to fixed point. Delivering up to 8,181 GMACs for symmetric filtering applications, the embedded DSP block includes enhancements for high definition video encoding, FEC (forward error correction) and CRC (cyclical redundancy check) for wired communications systems and for complex filtering and arithmetic commonly used in wireless communications and aerospace.

With more efficient resource utilisation per operation, the KU115's optimal performance-per-watt meets the needs of processing-intensive systems with stringent power and thermal requirements. Combined with high-level abstraction tools including Vivado High Level Synthesis and Xilinx's software-defined development environment for OpenCL, the family provides a complete solution to minimise compute bottlenecks when designing and implementing DSP-intensive algorithms.

The Kintex UltraScale FPGAs claim to deliver up to 1.16M logic cells, 5,520 optimised DSP slices, 76Mbit/s of block RAM, 16.3Gbit/s backplane-capable transceivers, PCIe Gen3 hard blocks, integrated 100Gbit/s Ethernet MAC and 150Gbit/s Interlaken IP Cores, and DDR4 memory interfaces operating at 2,400Mbit/s.





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