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Fully programmable switch scales to 3.2Tbit/s throughput

Posted: 17 Sep 2014     Print Version  Bookmark and Share

Keywords:switch chip  datacentres  Cavium 

The competition

Cavium makes its bid at a time when the dominant player in networking silicon, Broadcom, is within days of announcing the followup to its Trident II switch chip. Intel's Ethernet switches, from its acquisition of Fulcrum, occupy a middle ground—not as powerful as the Broadcom chips and not as configurable as Xpliant, according to Wheeler.

Among its other competitors, Mellanox has been expanding in recent years from its base in InfiniBand chips into hybrid InfiniBand and Ethernet silicon and to selling full systems. Marvell is also a player, with its Prestera Ethernet chips, but currently only has a small slice of the market, says Wheeler.

Other start-ups are said to be in the works. Barefoot Networks gets most mention as a team with concepts similar to those of Xpliant and ties to OpenFlow founders, but it is still in an early stage of development, notes Wheeler. As network virtualisation gains traction, the field is likely to spawn many more competing architectures.

Cavium plans at least four versions of its Xpliant chips, at above and below the current performance levels of the Broadcom Trident II. They all support native 25G interfaces based on an emerging standard the IEEE said in July it will set.

The first Xpliant chip is "in the final stage of tape-out" with first silicon expected to sample by the end of the year. A handful of OEMs already have Xpliant SDKs.

The chips come pre-loaded with support for a laundry list of existing protocols. Cavium will add any new or proprietary protocol within two weeks for an undisclosed charge.

Currently Cavium aims to keep in-house its tools for configuring the architecture, but it might release them in the future. OEMs or big users can write their own applications and control plane software using an API in the developers' kit.

Cavium did not disclose the cost of the chips, the largest of which will be made in a 28nm high-performance process at TSMC and fit in a 55mm2 FCBGA package

"It is a big chip, but there's nothing fundamental that forces us into larger die size than anyone else attacking the problem," said Eric Hayes, general manager of Cavium's switch group.

- Rick Merritt
  EE Times

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