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Dead-time compensation for VSI drives

Posted: 18 Jul 2014     Print Version  Bookmark and Share

Keywords:pulse width modulated  voltage source inverter  DC bus circuit  PWM-VSI  inserted blanking 

One of the main problems in pulse width modulated voltage source inverter (PWM-VSI) drives is the non-linear voltage gain caused by non-ideal characteristics of the power inverter. The most important non-linearity is caused by the necessary blanking time between top and bottom switch to avoid inverter leg shout-through of the DC bus circuit. The type of the switch and pre-driver characteristics determine amount of the necessary blank time. The error caused by this phenomena can be significant in various cases and can cause the drive regulation issues and system instabilities.

This application note shows one of the methods to minimise or eliminate impact of the inserted blanking time so-called dead-time.

View the PDF document for more information.

Originally published by Freescale Semiconductor Inc. at as "Dead-Time Compensation Method for Vector-Controlled VSI Drives Based on Qorivva Family".

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