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Optimising software for power efficiency (Part 1)

Posted: 17 Jun 2014     Print Version  Bookmark and Share

Keywords:power consumption  algorithmic  hardware  data flow  static 

While this is an over-simplification, we can imagine that the clock network in a core consumes power in such a fashion. Thus at every clock edge, when the potential changes, current flows through the device until it reaches the next steady state. The faster the clock is switching, the more current is flowing, therefore faster clocking implies more power consumed by the embedded processor. Depending on the device, the clock circuit is responsible for consuming between 50% and 90% of dynamic device power, so controlling clocks is a theme that will be covered very heavily here.

Types of power consumption
Total power consumption consists of two types of power: dynamic and static (also known as static leakage) consumption, so total device power is calculated as:

Ptotal = PDynamic + PStatic

As we have just discussed, clock transitions are a large portion of the dynamic consumption, but what is this "dynamic consumption"? Basically, in software we have control over dynamic consumption, but we do not have control over static consumption.

Static power consumption: Leakage consumption is the power that a device consumes independent of any activity or task the core is running, because even in a steady state there is a low "leakage" current path (via transistor tunnelling current, reverse diode leakage, etc.) from the device's Vin to ground. The only factors that affect the leakage consumption are supply voltage, temperature, and process.

We have already discussed voltage and process in the introduction. In terms of temperature, it is fairly intuitive to understand why heat increases leakage current. Heat increases the mobility of electron carriers, which will lead to an increase in electron flow, causing greater static power consumption. As the focus of this chapter is software, this will be the end of static power consumption theory.

Dynamic power consumption: The dynamic consumption of the embedded processor includes the power consumed by the device actively using the cores, core sub-systems, peripherals such as DMA, I/O (radio, Ethernet, PCIe, CMOS camera), memories, and PLLs and clocks. At the low level, this can be translated to say that dynamic power is the power consumed by switching transistors which are charging and discharging capacitances.

Dynamic power increases as we use more elements of the system, more cores, more arithmetic units, more memories, higher clock rates, or anything that could possibly increase the amount of transistors switching, or the speed at which they are switching. The dynamic consumption is independent of temperature, but still depends on voltage supply levels.

Maximum, average, worst-case and typical. When measuring power, or determining power usage for a system, there are four main types of power that need to be considered: maximum power, average power, worst-case power consumption, and typical power consumption.

Maximum and average power are general terms, used to describe the power measurement itself more than the effect of software or other variables on a device's power consumption.

Simply stated, maximum power is the highest instantaneous power reading measured over a period of time. This sort of measurement is useful to show the amount of decoupling capacitance required by a device to maintain a decent level of signal integrity (required for reliable operation).

Average power is intuitive at this point: technically the amount of energy consumed in a time period, divided by that time (power readings averaged over time). Engineers do this by calculating the average current consumed over time and use that to find power. Average power readings are what we are focusing on optimising as this is the determining factor for how much power a battery or power supply must be able to provide for a processor to perform an application over time, and this also used to understand the heat profile of the device.

Both worst case and typical power numbers are based on average power measurement. Worst-case power, or the worst-case power profile, describes the amount of average power a device will consume at 100% usage over a given period. One hundred per cent usage refers to the processer utilising the maximum number of available processing units (data and address generation blocks in the core, accelerators, bit masking, etc.), memories, and peripherals simultaneously. This may be simulated by putting the cores in an infinite loop of performing six or more instructions per cycle (depending on the available processing units in the core) while having multiple DMA channels continuously reading from and writing to memory, and peripherals constantly sending and receiving data. Worst-case power numbers are used by the system architect or board designer in order to provide adequate power supply to guarantee functionality under all worst-case conditions.

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