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Optimising software for power efficiency (Part 1)

Posted: 17 Jun 2014     Print Version  Bookmark and Share

Keywords:power consumption  algorithmic  hardware  data flow  static 

One of the most vital considerations in the product lifecycle of an embedded project is to understand and optimise the power consumption of the device. Power consumption is highly visible for hand-held devices which require battery power to be able to guarantee certain minimum usage/idle times between recharging. Other embedded applications, such as medical equipment, test, measurement, media, and wireless base stations, are very sensitive to power as well—due to the need to manage the heat dissipation of increasingly powerful processors, power supply cost, and energy consumption cost—so the fact is that power consumption cannot be overlooked.

The responsibility for setting and keeping power requirements often falls on the shoulders of hardware designers, but the software programmer has the ability to provide a large contribution to power optimisation. Often, the impact that the software engineer has on influencing the power consumption of a device is overlooked or underestimated.

The goal of this series of articles is to discuss how software can be used to optimise power consumption, starting with the basics of what power consumption consists of, how to properly measure power consumption, and then moving on to techniques for minimising power consumption in software at the algorithmic level, hardware level, and data-flow level. This will include demonstrations of the various techniques and explanations of both how and why certain methods are effective at reducing power so the reader can take and apply this work to their application right away.

Basics of power consumption
In general, when power consumption is discussed, the four main factors discussed for a device are the application, the frequency, the voltage and the process technology, so we need to understand why exactly it is that these factors are so important.

The application is highly important, so much so that the power profile for two hand-held devices could differ to the point of making power optimisation strategies the complete opposite. While we will be explaining more about power optimisation strategies later on, the basic idea is clear enough to introduce in this section.

Take for example a portable media player vs. a cellular phone. The portable media player needs to be able to run at 100% usage for a long period of time to display video (full-length movies), audio, etc. We will discuss this later, but the general power-consumption profile for this sort of device would have to focus on algorithmic and data flow power optimisation more than on efficient usage of low-power modes.

Compare this to the cellular phone, which spends most of its time in an idle state, and during call time the user only talks for a relatively small percentage of the time. For this small percentage of time, the processor may be heavily loaded, performing encode/decode of voice and transmit/receive data. For the remainder of the call time, the phone is not so heavily tasked, performing procedures such as sending heartbeat packets to the cellular network and providing "comfort noise" to the user to let the user know the phone is still connected during silence. For this sort of profile, power optimisation would be focused first on maximising processor sleep states to save as much power as possible, and then on data flow/algorithmic approaches.

In the case of process technology, the current cutting-edge embedded cores are based on 45 nm and in the near future 28 nm technology, a decrease in size from its predecessor, the 65 nm technology. What this smaller process technology provides is a smaller transistor. Smaller transistors consume less power and produce less heat, so are clearly advantageous compared with their predecessors.

Smaller process technology also generally enables higher clock frequencies, which is clearly a plus, providing more processing capability, but higher frequency, along with higher voltage, comes at the cost of higher power draw. Voltage is the most obvious of these, as we learned in physics (and EE101), power is the product of voltage times current. So if a device requires a large voltage supply, power consumption increase is a fact of life.

While staying on the subject of P=V*I, the frequency is also directly part of this equation because current is a direct result of the clock rate. Another thing we learned in physics and EE101: when voltage is applied across a capacitor, current will flow from the voltage source to the capacitor until the capacitor has reached an equivalent potential.

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