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The importance of RTL signoff

Posted: 03 Jun 2014     Print Version  Bookmark and Share

Keywords:RTL signoff  Functional coverage  Clock domain crossings  Timing constraints  Power consumption 

The need to manage this risk is driving an increased reliance on IP reuse, where a significant portion of the SoC design content comes from sources outside the SoC team. Using proven IP content reduces content design risk, but still leaves risk in assembly and "spec" compliance. IP are not yet plug-and-play and are open to bugs, misuse, abuse, and surprises when used outside tested configurations. Any of these issues can derail a project plan that previously appeared risk-free and on-track.

TL signoff, however, can be the preventative medicine a designer needs, and here's why:

It can contribute a 60% reduction in design risk because:

RTL tools run faster than layout tools, which allows you to find and fix a lot more problems at RTL, per unit of time, than you can at synthesis or layout.

Higher quality RTL reduces risk of iterations from synthesis or layout back to RTL. As we all know, a restart of design layout is very expensive.

RTL signoff can be applied very effectively to IP, both internal and external. Since most IP is sourced as RTL, signoff checks can and must be enforced as part of handoff requirements from the IP supplier, and as acceptance checks by the SoC team. When dealing with configurable IP, there is no guarantee the configuration you want to use in your SoC has been thoroughly validated by your supplier.

Figure 2: RTL signoff.

A rigorous IP signoff methodology at RTL also enables significant efficiencies for SoC level RTL signoff (SoC signoff). At the SoC level, you must validate assumptions in the IP and make necessary tweaks when the two are not in sync. Once validated, the SoC level signoff can focus on IP integration and common place issues at the top level. It should not be necessary to validate the internals of IP at this stage, as long as you can intelligently abstract IP validation models. Abstraction can drive an order of magnitude improvement in analysis time and hardware requirements. Ultimately it leads to a significantly simplified signoff flow.

For 2014, RTL signoff is no longer a choice ... It is a design imperative!

For a number of years now, leading edge SoC design teams have been practicing and reaping the benefits of RTL signoff, and it is now included in mainstream SoC design flows. If RTL signoff is not part of your methodology, it should be! Selective checklists are not a substitute for a comprehensive and disciplined approach. You would never sign off layout with selective checks. So, why would you accept anything less than comprehensive RTL signoff?

About the author
By Piyush Sancheti is Vice President, Marketing at Atrenta Inc.

To download the PDF version of this article, click here.


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