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IBM reveals PCM-based storage system

Posted: 13 May 2014     Print Version  Bookmark and Share

Keywords:IBM  PCIe  PCM  solid-state memory  SSD 

In a presentation at the 2014 Non-Volatile Memory Workshop, IBM has demonstrated how to incorporate phase change memory (PCM) into a solid-state memory hierarchy, and has also revealed its first PCIe-based prototype board for storage systems. The company described its architecture, compared it to flash-based solid-state drives (SSDs), and proposed a server system that eliminated the hard-disk drive (HDD) in favour of a memory hierarchy using both flash-based arrays and PCM-based arrays. In comparisons, the PCM-based arrays handily beat flash.

Ioannis Koltsidas shows PCM-based prototype board

Ioannis Koltsidas, an IBM storage systems research staff member, shows his prototype board that outperforms flash alone by adding phase change memory (PCM). (Source: IBM)

"The comparison was between flash SSD and our PCM PCIe card: it was a comparison at the system level of the two storage devices," said Ioannis Koltsidas, a member of the IBM storage systems research staff. Working with the University of Patras in Greece, which helped name the card Theseus after a hero in Greek mythology, the researchers compared the PCM-based PCIe card with two flash SSDs, an enterprise-grade flash SSD and a consumer-grade flash SSD. "We found the times for the two flash SSDs to be 12x and 275x longer than for the PCM PCI-e card."

Though PCM memory chips have been around since 2012, there have been very few deployments and quite a few complaints about reliability. Nevertheless, IBM appears to be gung ho about the possibilities of PCM-based memories, one would assume, after the bugs are worked out.


PCM (blue) can fit into many slots in the memory hierarchy for servers and storage systems, according to IBM.

The biggest advantage of PCM over flash is that its performance is higher than flash, though not as high as DRAM, plus it enjoys the non-volatility of flash. Also, PCM normalised input/output (I/O) throughput is on the rise at a time when HDD I/O operations per second are waning. Today flash is filling the gap, but PCM could take over that job. Flash is also facing scalability problems and can only be rewritten about 10,000 times at the most. PCM's scalability is on the rise, and it can be rewritten at least 10 million times, or, with forward error correction, at least 10 trillion times.

PCM uses a chalcogenidic alloy sandwiched between two electrodes. A high current turns the chalcogenidic alloy amorphous (representing a 0), whereas a medium current turns it crystalline (representing a 1), and a low current allows its state to be read out. Programming times for 0s and 1s are 70ns and 120ns, respectively. IBM's tests used PCM memories fabricated at a relaxed feature size of 90nm and a clock frequency of 66MHz.

- R. Colin Johnson
  EE Times

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