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Applying DFM to PCB development

Posted: 16 Apr 2014     Print Version  Bookmark and Share

Keywords:design for manufacturing  DFM  PCB  Tombstoning  BGA 

In design for manufacturing (DFM), PCB design layout engineers can easily overlook key factors that at first glance do not appear to be of any value. However, later on, these factors play a major role during manufacturing and can turn out to be the root cause of poor yields.

When it comes to high-speed PCB designs, above 20 GHz in particular, lack of communication and/or faulty assumptions between PCB designers and the manufacturing team can lead to costly failures during manufacturing. Following are some real-world scenarios in which communication problems have occurred and some tips on how to avoid such problems.

Scenario #1: Reduce pad size to match trace width
In this case, the PCB designer had reduced the pad size to match the trace width. He didn't think twice about it; it is quite acceptable to do so. Unfortunately, it was reduced so much that this misstep violated IPC and manufacturing rules.

The consequence was a number of issues in manufacturing and in particular, tombstoning occurred, as shown in figure 1. Tombstoning is a component defect that occurs at the PCB assembly stage due to the solder's surface tension during reflow. As a result, one end of the component is detached from a PCB's copper pad and lifts up vertically, resembling a tombstone.

Figure 1: Tombstoning.

This situation came about because solder was flowing into the trace because it was the same size as the pad, and there was movement during reflow. The result was a mismatched pad size. Together with other DFM issues, yields were below 60 percent, far below the expected 90 percent.

Other DFM problems included:

 • Solder shorts caused by a gang relief mask
 • Use of thermal vias caused solder wicking through the barrel
 • Insufficient solder mask between two pads
Actually, the PCB designer's decision to make the trace width as the same size as the pad was indeed correct: in any high-speed signal, discontinuities in impedance are created when a signal's geometry changes, which in turn changes impedance of a trace. By using the same trace width as the pad size, signal geometry would not change and the amount of discontinuity is reduced when the trace enters the leads of the discrete component pad. In theory this works. However, in practice, manufacturing issues arise when the same size is used for both traces and pads that are too small, resulting in tombstoning and other assembly issues.

Specifically, in this case, the fan out trace is the same size as a pad. Here a ball-grid array (BGA) package is used, with the BGA pads fanned out with a thicker trace. If it's not a non-solder mask defined (NSMD) pad, the solder flows into the traces for those particular pads, causing a non-uniform pad size forming under the BGA, and subsequently forming cold solder joints or voids, as shown in figure 2.

Figure 2: Voids in a BGA.

Scenario #2: RF filter problems
In this case, the high-speed design included a specialized RF filter in a three-pin SOP package. Solder mask was not used in between the pins and it was gang relieved, which is a method of defining a solder mask so that the mask is avoided around a group of pins. The result is a set of pins that don't have solder mask in between. This may be done intentionally or may be a mistake on the part of the PCB designer. The result was solder shorts between the three pads of the filter.

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