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Hardware, software implications of endianness

Posted: 14 Apr 2014     Print Version  Bookmark and Share

Keywords:software programmers  endianness  computing processor  compilers  CPU 

Guess what the value of var8 would be at Bookmark D? If you said "it depends on whether the system is little endian or big endian", you could jump ahead to the next section of this article. If you guessed 0x44 or any other value, read on.

Remember that in a little endian system, when an element of multi-byte length data type is written to memory, the least significant byte is stored in the lowest address offset of memory. Whereas, in a big endian system the most significant byte is stored in the lowest address offset of memory.

Let us say in the above code, ptr32 takes the address value 0x80000000 from the malloc. The content of byte addressable locations starting at address 0x80000000 would look as follows at Bookmark B:

From the above layout in memory, it is clear that var8 gets the value 0x11 in a little endian system and value 0x44 in a big endian system.

An easy rule of thumb for remembering the little endian/big endian difference is LLL—Little endian, Least significant byte, Lowest address).

Now consider the following section of code:

At Bookmark H, var16 will have value 0x2211 in a little endian system and 0x4433 in a big endian system. When var16 get its value from address 0x80000000 using a 16bit (two byte) access, the two bytes starting at location 0x80000000 are read out. These turn out to be 0x11 and 0x22 in little endian system and 0x44 and 0x33 in big endian system. Further, in a little endian system, of the two bytes that are read out, the byte stored at the lower address is interpreted as the least significant byte. That is, 0x11 is interpreted as the least significant byte and 0x22 is interpreted as the most significant byte resulting in var16 getting a value of 0x2211. Likewise, in a big endian system, the byte stored in the lower address is interpreted as the most significant byte.

How do programmers ensure that they do not get surprises when accessing selective bytes of multi-byte length elements? One option would be to write a variant of code for each endianness mode and use a compile time flag and use #ifdef's to select the proper variant – but this is a cumbersome approach. A better way around the problem is to keep in mind that software sees the endianness effect only when mixing data types—specifically, when storing a certain byte-length element into memory and reading the same memory as a different byte-length element. So, the solution is that, if a 32bit element was stored at a memory address, the content at that memory address needs to be read out as 32bit element only. Once it is read out of memory and is in a CPU register, the required bytes can be extracted from it.

For example, the endianness-proof software variant of the above code section is as follows:

Hardware implications of endianness
Today's complex SoCs have many hardware IP blocks integrated with the CPU core, which all communicate via interconnected buses. Each bus may serve a specific purpose for the hardware IP block, such as obtaining its configuration parameters, obtaining input data for processing, or giving out the output data after processing. A bus may be designed in different widths such as 32-, 64- or 128bit lines, depending on the transfer bandwidth requirements of its hardware end points. Data transfer is done over a bus between the end points in units called transactions. A transaction encompasses the actual data transferred, as well as the address of data and any clocking/control signalling for synchronising transmission and reception. A transaction can be a read type or a write type.

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