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1MHz ADC sampling with MPC5746M

Posted: 16 Apr 2014     Print Version  Bookmark and Share

Keywords:MPC5746M  microcontroller  Analogue to Digital Converter  SARADC 

The MPC5746M microcontroller features eight Successive Approximation Register Analogue to Digital Converter (SARADC) modules. The maximum sampling frequency of each SARADC module is 406kHz, and if the pre-charge feature is used the maximum sampling rate is reduced to 366kHz. The Nyquist -Shannon sampling theorem dictates that the maximum frequency that can be perfectly reconstructed will be half the sampling rate, so this gives a maximum SARADC bandwidth of 203kHz. While this bandwidth is sufficient for the majority of applications that the device may be used in, the end user may have a specific requirement to sample a higher frequency signal. It is possible to increase the sampling rate by connecting several of the SARADCs in parallel in a method known as time interleaving. This application note details a method of time interleaving three SARADC modules to triple the sampling rate, giving a final sampling frequency of 1MHz. While the application note specifically details using three SARADC modules on the MPC5746M device, the concept can be applied to two or three SARADC modules. If the pre-charge feature is not used then a maximum of three SAR can be interleaved, this is reduced to two if the precharge feature is used. This limitation on the maximum amount of SARADC that can be interleaved is because the sampling time of each SARADC will overlap if more are used. A source code package for this application note is distributed alongside it to help the end user implement the system and understand the device configuration.

View the PDF document for more information.

Originally published by Freescale Semiconductor at as "1MHz ADC Sampling Using MPC5746M".

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