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Minimise metastability with User Grey Cell approach

Posted: 17 Mar 2014     Print Version  Bookmark and Share

Keywords:IPs  EDA  User Grey Cell  clock domain crossing  CDC 

Even though the IPs can be encrypted and decrypted with proper key management, some IP developers are still not convinced that the IP will not end up in the wrong hands. Consequently, Blue Pearl Software developed the User Grey Cell methodology that works on all types of IP without any need to ship the proprietary information. In fact, designers can perform CDC analysis through the FPGA vendor protected/generated IPs.

Basic CDC analysis
Before we get into the details of User Grey Cell, let us first perform a quick refresher on basic CDC analysis. A clock domain crossing occurs whenever data is transferred from a flip-flop driven by one clock to a flip-flop driven by another clock. Traditional simulation and/or static timing analysis methods are not sufficient to verify that the data is transferred consistently and dependably across clock domains. Thus, CDC analysis tools emerged to assist designers in checking for these potential issues. Let's point out that some FPGA designers tend to wait to debug in the lab. However, it is better to use verification tools on the RTL, rather than waiting for the lab.

A basic CDC analysis tool should check and report on some simple issues, e.g., the existence of unsynchronised and synchronised schemes. It should report even if one bit of a bus can cause CDC, check if data is being clocked using both rising and falling edges, check if a fast clock transfers data to a slow clock (potential data loss), and check if level sensitive latch data is combined with edge triggered data.

However, if an FPGA vendor generated IP, such as CoreGen or MegaFunction, is included in the design, then this is typically treated as a Black Box. Any information regarding the IP ports with clock interactions is lost, and therefore the CDC analysis is not as thorough as it could be. This is solved via our User Grey Cell Methodology.

What is a User Grey Cell?
A User Grey Cell, as depicted in figure 1, contains more information than a Black Box. The User Grey Cell reduces the amount of information in the complete proprietary RTL design to what is sufficient for CDC analysis.

Figure 1: User Grey Cell representation.

The User Grey Cell provides clocking and register information that allows for an accurate CDC analysis. When creating a Use Grey Cell, the user needs to specify only those ports that are relevant to the current design, rather than specify all the ports. A User Grey Cell is specified in xml format. A default set is supplied in the Blue Pearl Software distribution package, and a designer can create new User Grey Cells that will be recognised by the software. Some key elements of the xml content include the following:

Cell attributes: This allows for matching between entity and architecture. Specify the name of the module and some of its properties, such as whether you are creating a synchronisation cell.

Input and output pins: Specification of a regular input or output pin requires either notation of a clock pin, in which case a DFF is inferred, or that the pin is asynchronous. You also have the option of specifying a reset pin along with a clock.

Clock pins: An inferred DFF for an input or output must be matched with a specified clock input pin. A clock output pin represents a new clock domain.

Reset pins: An inferred DFF for an input or output can be matched with a specified reset pin, as noted above.

Figure 2: User Grey Cell in xml.

The xml syntax is also flexible enough to allow for equation definition and parameterisation of the pins. In figure 2, a simple User Grey Cell xml is shown with the definitions of the input, output, reset, and clock pins.

Benefits of a User Grey Cell
So far, we have discussed how the User Grey Cell enables CDC analysis beyond what is possible with just a Black Box methodology. Some other benefits, which may not be immediately evident include the following:
 • Since different models for different bus width are not required, the use of parameterizable ports greatly reduces the number of models required, especially for complex components such as memories and FIFOs.
 • Because clock and reset relationships for each pin are specified in the User Grey Cell, the complexity of CDC setup and analysis is greatly reduced. This is true especially for complex cores like DDR or PCI express that may have internal reset, clock network and synchronisers.
 • A User Grey cell, when defined as a synchronisation cell, allows for that cell to be used as a synchroniser in the context of the design. A CDC analysis can be run with this User Grey Cell labelled as synchroniser.

User Grey Cell flow
A User Grey Cell flow can fill many of the holes left by Black Boxes. First, let's differentiate between User Grey Cell creation and User Grey Cell usage, as shown in figure 3.

Figure 3: User Grey Cell flow.


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