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Quick start guide for Carmel Zedboard

Posted: 12 Feb 2014     Print Version  Bookmark and Share

Keywords:Xilinx  ISE  Carmel  FPGA  software development kit 

The top level of the hardware design is a Xilinx ISE Project Navigator Project (.XISE) for Xilinx ISE version 14.2. The Verilog-based top.v module provides FPGA/board net connectivity, allows HDL interaction with peripherals, and instantiates the wrapper that carries both the Zynq Processing System and (I2C, SPI, GPIO, UART) soft peripherals that interface to the Pmod ports. This is supplied as a Xilinx software development kit (SDK) project that includes a demonstration software application to evaluate the Carmel sub-system reference design. The lower level c-code driver routines are portable to the user's own software project.

Here's a high-level overview of the steps required to quickly get the Carmel design running by downloading and running the FPGA project. Detailed instructions for each step are provided in the following pages.

View the PDF document for more information.

Originally published by Maxim Integrated at as "Carmel (MAXREFDES18#) ZedBoard Quick Start Guide".

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