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Exploring the key features of NAND

Posted: 22 Jan 2014     Print Version  Bookmark and Share

Keywords:NAND flash  SSD  garbage collection  PCIe  Multilevel cell 

NAND flash has its own set of terminology, benefits and drawbacks. It has generated a proverbial gold rush by Dell, HP, EMC, and many start-ups. As only a new technology can, it is becoming the focal point in solution development.

Data centre administrators once had to manage hundreds or thousands of disc drives, along with LUN groups, shelves, RAID types, unit allocation, hotspots, complex software, and tiering. Now we can place all data into a single all-flash array (or a few of them) and enjoy amazing speed with little or no tuning or advanced planning. Even for systems with a moderate I/O workload, NAND technology can be cheaper once you factor in the software elimination, power reduction, and administration time.

Here are 10 key features of NAND-based all flash arrays that differ from SSD deployments.

No. 1: Reads, writes, and erases
NAND can be randomly read with no impact on performance, regardless of what part you want to read next. When it comes to writing again, writes within a block must be in order, but the different block in a die may be written in any order. Once a block has been fully written, there is only one way to write to it again: Pick it up and shake it. No, not really. You use the erase command, erasing the whole block—but picking it up and shaking it seems more dramatic.

No. 2: Garbage collection
With general garbage collection (GC), all data is recycled together in a block. Hot and cold GC—data with different rates of change—are recycled into different blocks. If your NAND GC does not happen fast enough to handle what you have put out for collection, you will not be happy.

No. 3: Controller
Flash controllers are similar to chefs and waiters in a restaurant. The waiter speaks your language (PCIe), and you may need a translator for the menu (SAS/SATA SSDs). The chef could be out of sight (over the SAN) or behind the counter (SAS). Sometimes, the chef will cook right in front of you (PCIe).

And while the latency from the stove to your plate can't be beat, the chef may want to involve you in the cooking process, calling it a "feature," much as some PCIe cards brag about involving the CPU in managing the flash via a software stack. This works when you are dining with the kids, but it's not so great when you are trying to have a business dinner.

No. 4: Wear leveling and error correction
There are a million ways to handle wear leveling, and almost all of them work. For error correction, you will often hear "up to N bits of error correction per 4 KB of data," where N is some big number. They won't point out that "up to" is not the same as "at least," or that non-errored reads are very different from failed read attempts. For consumer SSDs, the critical number is the failure rate of the SSD itself. For enterprise storage, the critical number is the mean time to data loss.

No. 5: SLC vs. MLC vs. eMLC vs. TLC
Single-level cell (SLC) technology is like writing on wide-ruled paper with a sharp pencil. It's easy to write fast, read, and erase. Multilevel cell (MLC) is like writing on college-ruled paper with a dull pencil. It's hard to write fast and not very easy to erase. Enterprise multi-level cell (eMLC) is like writing on college-ruled paper with a mechanical pencil and reading the results with reading glasses. It's even harder to write fast, but it's much easier to read and erase. Using triple-level cell (TLC) is slow and error prone, and it has such a short endurance.

No. 6: 3D NAND
3D NAND doesn't double the capacity of a 20nm 2D NAND by stacking two layers of 20nm NAND, but by stacking 16 layers of 40nm NAND, providing high endurance and low error rates. One of the most interesting things about 3D NAND is how differently various vendors have approached this new technology.

No. 7: Parallelisation (processing and storage access)
The speed limit on the roadway (the I/O bus) is 10 times what it was a few years ago. The number of bits read or written in a single operation has gone up from 4 KB to 8 KB to 16 KB. The number of write operations performed at the same time on a die has gone from one to two or four. Even without any changes in the NAND cell itself, NAND performance continues to increase as a result of greater parallel access and parallel operations.

No. 8: Random and dynamic I/O patterns
If the two locations you want to read are located in the same plane, then the second read has to wait for the first one to finish. If there are 256 planes in the dies of your SSD, and it takes 50 outstanding reads to reach a desired bandwidth, what are the chances that one of those reads has to wait behind another read? The answer is 99% of the time. Search online for "The Birthday Problem" to find out why.

No. 9: Transport matters (PCIe vs. FC vs. SAS)
Choosing the wrong technology can eliminate the many advantages of flash. This is frequently seen when multiple SSDs are put in a standard disc drive shelf, where the SAS link to the server is filled by the input/output per second (IOPs) of two or three SSDs, so 90% of the potential performance in the shelf is never available. Attaching flash with PCIe or SAN links allows the full performance of large collections of flash to be fully utilised.

No. 10: Cost-efficient architecture
Because of the high performance and low cost now possible with a single SSD, many people have suggested moving back to a storage-in-the-server model and away from the SAN model that has come to dominate enterprise disc storage systems.

What often gets forgotten is the performance lost in communication between the servers needed for access and redundancy, the two or three times additional capacity needed for redundancy in that model, and the amount of flash that goes to waste. This means that the cost analysis is a lot more complicated than just comparing the dollar per GB of each product.

About the author
Jon Bennett is the Chief Technology Officer of Violin Memory.

To download the PDF version of this article, click here.





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