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Altera demonstrates Suricata IDS/IPS system

Posted: 19 Nov 2013     Print Version  Bookmark and Share

Keywords:FPGA  design  OpenCL 

Altera Corp. has successfully demonstrated 'Suricata Engine'—an open-source Network Intrusion Detection and Prevention (IDS/IPS) system. The demonstration shows an accelerated Suricata Engine on a Stratix V FPGA developed with the Altera SDK for OpenCL.

By using the capacities of Stratix V FPGAs and the computing acceleration of OpenCL, this demonstration is suitable for government applications.

By leveraging the hardware and software acceleration on a Stratix V FPGA, and the Altera SDK for OpenCL for direct programming, customers can implement threat modelling and detection engines like Suricata to achieve high data rates and low-latency operations for the system, Altera said.

Altera is partnering with the Open Information Security Foundation (OISF) to provide open source IDS/IPS FPGA-based solutions, including Suricata.

"Designers of government and security systems are looking for open-source solutions that enable them to prevent, detect and respond to threats in the rapidly changing cyber security market," said Ian Land, senior manager, Military, Aerospace and Government product line at Altera. "Altera worked with the OISF to make the Suricata Engine available for use on Altera FPGAs to deliver a power-efficient platform to protect government and commercial systems from cyber attacks."

"The OISF is pleased to have Altera as a gold-level consortium member," said Matt Jonkman, President of the OISF. "The OpenCL version of the Suricata engine on Altera FPGAs, is a valuable tool to the open-source security community."

Altera Stratix V FPGAs are available now in volume production. The Altera SDK for OpenCL is currently available for download on Altera's website or through the purchase of an Altera Preferred Partner OpenCL board. The annual software subscription for the SDK for OpenCL is Rs.62,578.62 ($995).

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