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Understanding data acquisition in data converters

Posted: 14 Nov 2013     Print Version  Bookmark and Share

Keywords:ADC  characterisation  Data converter  FFT. SRAM  Data acquisition systems 

Data converter (ADC) characterisation is a requirement that has grown sophisticated over the years as more and more high speed converters are populating the market. Characterisation is a precise process that requires stable data acquisition systems to be fully synchronised with the data converter without introducing any artifacts.

Static and Dynamic analyses of data converters require capturing the N-bit data word, from the data converter, over several thousand samples for post processing and analysis. Post processing is required because most data converters like SAR don't have an on board hardware for FFT (harmonic analysis, noise analysis) and memory for code comparison (Gain, offset errors etc.).

For an N bit ADC characterisation it is required to capture minimum 2N+4 samples and post process them to know the performance of the ADC. After each conversion, the ADC stores the converted data in the result register. This data needs to be stored somewhere, or else it would be over written after the next conversion.

Fundamentally there could be only two ways to capture the conversion data:
1. Data is transferred to the external world after every conversion which we call "Real time data capture.
2. Data is first stored in the SRAM and later it is transferred to the external world which we call "Data capture through SRAM"

Both above methods have pros and cons which we will be discussing in the subsequent sections.

ADC conversion process
Before we go into details about the two methods mentioned above, let's see the basic step for the ADC conversion process. Please note – below steps are specific to SAR ADC's but can be generalized to other type of ADC's also.

Figure 1: Flow chart showing basic ADC conversion process.

Data acquisition systems and ADC
To capture digital data (N-bit data) usually a logic analyser or a High Speed Digital I/O (HSDIO) card is used. Figure 2 shows the basic diagram of data acquisition using a data acquisition card.

In figure 2, for an N-bit ADC, we need N GPIOs to be connected to LA (Logic analyser) or HSDIO. Other than this we need one CLKOUT (or Strobe) signal to trigger the data acquisition system, and a few handshaking signals depending on the data capture method.

Out of many high speed digital data capture cards, first we would explain by taking one card as a example which is a National Instrument HSDIO card.

Figure 2: ADC system with digital data acquisition system.

NI-PXI-6552 HSDIO card
HSDIO actually stands for HIGH SPEED DIGITAL INPUT OUTPUT and is a patented National Instruments digital data acquisition system. It is a digital waveform generator/analyser. It features 20 channels with programmable voltage levels and per clock cycle, per channel direction control. The module contains deep onboard memory with triggering and pattern sequencing.

Logic analyser
The data could also be captured using an LA. This is a digital acquisition system but with a graphical user interface and is not PXI-based instrument. The digital data input could be directly stored in form of a CSV file in the system and later on extracted using a remote interface for post processing.

About the author
Sudhansu Mishra is working as analogue validation engineer validating power management units, data converters and clocks in SOC. Mishra has a couple of years experience working on automotive SOCs.

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