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Power tip: Two methods for power supply grounding

Posted: 19 Apr 2013     Print Version  Bookmark and Share

Keywords:power supply  single-point ground  star system 

If you want to provoke a heated discussion between a group of power supply engineers, all you need to do is ask them how they layout the grounds in a power supply. You will quickly learn there are two basic strategies. Each side will swear that the other approach has no chance of functioning as they smugly remember how well their last design worked.

The first approach is based on the concept of a single-point ground or star system (figure 1). This idea steers the currents to control noise due to high di/dt in the conductors. A single-point ground is established at the ground of the control IC and all currents in the ground connection flow into that point. In this manner, high frequency, high slew-rate currents are not allowed to flow in sensitive paths such as the IC bypass capacitor, timing or analogue circuit connections. Unfortunately, this approach can significantly degrade circuit performance due to increased inductances that result from the longer connections. For instance, in figure 1, the star ground adds inductance to the transistor's source connection. The transistor's switching speed is related to this source inductance. As the transistor tries to turn off, the di/dt increases the source voltage and, hence, reduces the drive voltage gate-to-source. This slows the switching speed, which reduces efficiency. The additional inductance also distorts the current sense voltage, which can cause false tripping with peak current-mode control due to the leading edge spike.

Figure 1: Basic single-point grounding strategy puts significant inductance in source connection.

A variant of the single-point ground is shown in figure 2. Here, the power connections and analogue low-level circuit connections are made separately and tied together at one point. This has a number of benefits:

 • Minimises high-power current flow in the ground connections;
 • Reduces power path loop area to reduce electromagnetic interference (EMI) and improve switching speeds;
 • Creates an analogue ground to minimise noise in timing and control circuits.

Figure 2: A variant single-point approach constrains high-frequency currents.

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