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MCSC platform SoC speeds ASIC development

Posted: 13 Mar 2013     Print Version  Bookmark and Share

Keywords:Toshiba America Electronic Components  platform SoC  metal-configurable standard cell  MCSC  EDA 

Toshiba America Electronic Components Inc. has introduced a metal-configurable standard cell (MCSC) platform SoC. According to the company, the platform SoC uses an innovative MCSC architecture that speeds ASIC development for faster time-to-market at lower non-recurring engineering (NRE) costs.

In addition, the device enables footprint-compatible, low-cost FPGA replacement, and configurable and reusable platforms for standard product development.

The product uses 65nm process technology with 40nm and smaller processes in development. The 65nm process supports up to 30 million raw gates, 20Mb DP memories, and up to 1200I/Os. The platform also features a 500+ core cell library, a configurable FPGA-like memory with optimised size and performance and scalable technology for 28nm and smaller geometries.

Likewise, the platform SoC offer an enhanced-cell architecture allowing for improved routability, power structure and area optimisation; configurable I/Os, PLLs, DDR/LVDS PHYs and multi-protocol transceivers; a variety of packaging options to enable compatibility with existing FPGAs; and design of multiple SoCs from one MCSC platform using the same EDA tools and methodologies as for ASICs.

Toshiba has completed the qualification of this process and is accepting new designs for the platform SoC technology. Samples are available with a minimum of five weeks from RTL to prototype.

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