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Enable digital pre-distortion in cellular radio

Posted: 13 Mar 2013     Print Version  Bookmark and Share

Keywords:Cellular network  digital pre-distortion  LTE-Advanced 

Cellular network operators call for significant equipment cost reduction as they strive to increase the network capacity through the use of new air interfaces, new transmission frequencies, wider bandwidth, increasing antenna counts and a greater number of cell sites. Furthermore, these operators require increased equipment efficiency and greater network integration to reduce operating costs. To provide equipment that meets these disparate needs, manufacturers of wireless infrastructure equipment seek solutions that provide greater levels of integration with higher performance and increased flexibility, while delivering lower power and cost. In addition, the equipment providers must do this while shortening time to market.

The key to reducing the overall equipment cost is integration, but it is down to the advanced digital algorithms that improve power amplifier efficiency to reduce operating costs. One such algorithm that is commonly used is digital pre-distortion (DPD). It's a challenge to improve the equipment efficiency while the equipment configurations get ever more complex. Radio transmission bandwidths are approaching 100MHz with LTE-Advanced, and even exceeding that as vendors attempt to combine multiple air interfaces in a non-contiguous spectral configuration. Active antenna arrays (AAA) and multiple-input and multiple-output (MIMO) enabled remote radio units (RRUs) continue to put further pressure on the compute bandwidth required of these algorithms. In this article we'll investigate how the Zynq-7000 All Programmable SoC can be used to increase the performance of current and future DPD systems while offering equipment vendors full programmability, low cost and power along with fastest time to market.

Cellular radio on an all programmable SoC
This SoC marries high performance programmable logic (PL) fabric containing serial transceivers (SERDES) and DSP blocks that are tightly integrated with a hardened processing sub-system (PS). The PS contains an ARM dual-core Cortex-A9 MPCore, floating point units (FPUs) and NEON Media Accelerator coupled with a rich set of peripherals such as UARTs, SPI, I2C, Ethernet and memory controllers necessary for complete radio operation and control. Unlike an external general purpose or DSP processor, the interface between the PL and PS allows very high bandwidth due to a large number of connections that would be impractical on a discrete solution. With such an array of hardware and software this device is capable of implementing all the required functions of RRUs in a single chip.

Figure 1: Digital Pre-Distortion broken into functional partitions.

The abundant DSP resources in the PL are used to implement the digital signal processing such as digital up conversion (DUC), digital down conversion (DDC), crest factor reduction (CFR) and DPD. In addition, the SERDES are capable of supporting 9.8Gbps CPRI and 12.5Gbps JESD204B needed to interface to base band and data converters respectively. The PS supports both symmetric multi-processing (SMP) and asymmetric multi-processing (AMP). In this case it is assumed that the AMP mode is used where one of the Cortex-A9 processors implement the board level control functions, such as message termination, scheduling, calibration and alarms running either bare metal or, more likely, an operating system such as Linux. While the other is used to implement parts of the desired DPD algorithm, as not all parts of this algorithm warrant a full hardware solution.

DPD improves power amplifier efficiency by extending its' linear range. Efficiency is improved when the amplifier is driven harder to improve the output power, while static power remains relatively constant. In order to extend this linear range, DPD uses an analogue feedback path from the amplifier and a significant amount of signal processing to calculate coefficients that are used to represent the inverse of the amplifier's non-linearity. These coefficients are then used to pre-correct the transmitted signal driving the power amplifier, resulting in the increase of the amplifier's linear range. The DPD algorithm can be broken down into multiple functions as shown in figure 1.

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