Global Sources
EE Times-India
EE Times-India > EDA/IP

SoC Sobel filter implementation with Vivado

Posted: 28 Jan 2013     Print Version  Bookmark and Share

Keywords:Sobel  filter  SoC 

This application note illustrates how to generate the Sobel edge detection filter in the Zynq-7000 All Programmable SoC ZC702 Base Targeted Reference Design (TRD) using the Vivado High-Level Synthesis (HLS) tool. The techniques described in this application note present the fundamental flow for integrating an IP block generated by the Vivado HLS tool into a Zynq AP SoC-based system.

View the PDF document for more information.

Originally published by Xilinx Inc. at as "Zynq All Programmable SoC Sobel Filter Implementation Using the Vivado HLS TooL".

Comment on "SoC Sobel filter implementation with..."
*  You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.


Go to top             Connect on Facebook      Follow us on Twitter      Follow us on Orkut

Back to Top