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Altera, ARM, release FPGA toolkit

Posted: 20 Dec 2012     Print Version  Bookmark and Share

Keywords:embedded  software  development kit  SoC  FPGA 

Altera Corp. and ARM jointly announce the ARM Development Studio 5 (DS-5) Altera Edition embedded software development toolkit with FPGA-adaptive debug capabilities for Altera SoC devices.

The toolkit aims to remove the debugging barrier between the integrated dual-core CPU sub-system and FPGA fabric in Altera SoC devices. It combines a multi-core debugger for the ARM architecture with the ability to adapt to the logic contained in the FPGA. It gives embedded software developers a high level of full-chip visibility and control through the standard DS-5 user interface.

The toolkit will be included in the Altera SoC Embedded Design Suite and will begin shipping in early 2013.

SoC devices
Altera's SoCs combine a dual-core ARM Cortex-A9 processor with FPGA logic on a single device, giving users the power and flexibility to create custom field-programmable SoC variants by implementing user-defined peripherals and hardware accelerators in the FPGA fabric. Altera is currently shipping initial samples of its Cyclone V SoC devices.

The ARM Development Studio 5 (DS-5) Altera Edition toolkit dynamically adapts to unique customer configurations of the FPGA within the SoC to extend embedded debugging capabilities across the CPU-FPGA boundary and unify software debugging information from the CPU and FPGA domains with the standard DS-5 user interface. When combined with the advanced multi-core debugging capability of the DS-5 Debugger, and the link to the Quartus II software SignalTap logic analyser for cross-triggering capability, the toolkit delivers an unprecedented level of debugging visibility and control that leads to substantial productivity gains.

The toolkit suite claims the most advanced multi-core debugger in the market for the ARM architecture. It supports debugging on systems running in asymmetric multi-processing (AMP) and symmetric multi-processing (SMP) system configurations. It is broadly used for board bring-up, driver development, OS porting, bare-metal and Linux application development, through JTAG and Ethernet debugging interfaces, and offers Linux and RTOS awareness.

The ARM DS-5 Altera Edition toolkit features:
 � Software debug view adapts to include the peripheral devices programmed by the developer into the FPGA fabric, providing a seamless view of both the hard and soft peripheral register memory map of the entire SoC.
 � The DS-5 Debugger simultaneously displays debug/trace data for the Cortex-A9 processor cores and CoreSight-compliant custom logic cores implemented in the FPGA fabric.
 �  Altera USB Blaster JTAG debug cable supports both the DS-5 debugger and other Altera JTAG-based tools for the Altera SoC device.
 � Allows non-intrusive capture and visualisation of signal events in the FPGA fabric that can be time-correlated with software events and processor instruction trace.
 � Supports advanced, signal-level hardware cross-triggering between the CPU and FPGA logic domains, which enables cross-domain hardware/software co-debugging.
 � Includes the DS-5 Streamline performance analyser, which correlates software thread and event information with hardware counters from both the SoC and FPGA, enabling the identification and correction of system-level bottlenecks.

The ARM DS-5 Altera Edition toolkit will be included in the Altera SoC Embedded Design Suite (Altera SoC EDS) Subscription Edition for Rs.52,645.50 ($995). The Altera SoC EDS will start shipping in early 2013.

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