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EE Times-India > EDA/IP

Renesas taps Synopsys' litho verification sol'n

Posted: 20 Apr 2012     Print Version  Bookmark and Share

Keywords:lithography  verification  OPC 

Renesas Electronics Corp. adopts Synopsys Inc.'s Proteus LRC as a comprehensive lithographic verification solution offering high accuracy and low cost of ownership.

Through the use of industry-proven lithography models and integrated rigorous simulation, Proteus LRC identifies yield-impacting hotspots prior to committing a design to manufacture. Proteus LRC minimises the risk of costly re-spins and can improve time to market for new technology nodes, according to the company.

"We require a highly accurate lithographic verification solution that has a low cost of ownership and has ability to reduce our process development time," said Nobuyasu Yui, department manager, Analogue Design Technology Development Department, EDA & Design Methodology Division, Technology Development Unit at Renesas Electronics Corp. "The adoption of Proteus LRC for our leading-edge microcontroller has improved our optical proximity correction development efficiency contributing to faster time to market."

Proteus LRC is said to use the same industry-proven compact models utilised during the application of Proteus optical proximity correction (OPC) for easy deployment and dependable accuracy. Further accuracy and precise validation of hotspots can be achieved through resist profile and topography simulations with the embedded Sentaurus Lithography rigorous simulator.

Proteus LRC is built on the Proteus engine and integrated into Synopsys' Proteus Pipeline Technology, enabling a single-flow solution from design tape-out to mask fracture. The Pipeline is said to deliver concurrent processing at all stages of the mask synthesis and fracture flow to minimise I/O time for efficient handling of large terabyte datasets encountered at leading-edge technology nodes. The Proteus engine boasts an industry-proven platform that is highly scalable to hundreds, even thousands, of CPUs. This enables control of turnaround time while maintaining the lowest cost of ownership through the use of standard x86 processor cores.

"Proteus LRC and the embedded Sentaurus Lithography simulator deliver industry-leading hotspot detection accuracy, enabling faster development time and increased first pass yield," said Howard Ko, senior vice president and general manager of the Silicon Engineering Group at Synopsys.

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