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EE Times-India > EDA/IP

Intel, Xilinx invest in EDA startup

Posted: 11 Apr 2012     Print Version  Bookmark and Share

Keywords:EDA  acquisition  funding 

EDA start-up Oasys Design Systems has received unspecified amount of funding from Intel Capital, Intel's global investment arm, and Xilinx.

California-headquartered Oasys provides physical synthesis tools for designing and implementing ICs with more than 20 million gates. The company said it will use the funding to expand its research and development team, as well as for further expansion of its worldwide support structure.

"Oasys' technology has the potential to positively impact the design flow for VLSI chip implementation," said Shishpal Rawat, director, business enabling programs, design technology solutions group, Intel. "This is a new way of thinking for next-generation chip design implementation. We are pleased to invest in Oasys."

"Xilinx has licensed Oasys technology and achieved excellent results across a wide range of designs," says Salil Raje, vice president, software and IP product development, Xilinx. "We have a long-standing and productive working relationship with the Oasys team and we are pleased to extend our support through this investment."

Oasys claims its 'RealTime Designer' is the first design tool for physical register transfer level (RTL) synthesis of 100-million gate designs and produces better results in a fraction of the time needed by traditional logic synthesis products. It features a unique RTL placement approach that eliminates unending design closure iterations between synthesis and layout.

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