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# Power tip: Managing high dI/dt load transients (Part 2)

Posted: 28 Mar 2012     Print Version

Keywords:equivalent series inductance  power system design

In the previous power tip, we covered capacitive bypassing requirements for loads with rapidly changing currents. We found it imperative to have low equivalent series inductance (ESL) capacitors physically close to the load, as less than 0.5 nH can create unacceptable voltage excursions.

Realistically achieving this low inductance requires multiple bypass capacitors and multiple interconnect pins into the processor package. Let's discuss the amount of bypassing capacitance required with realistic di/dt requirements at the power supply output.

Figure 1 shows the power system's P-SPICE model for this discussion. This figure consists of a power supply with compensation circuitry, modulator (G1) and output capacitor. Included are interconnect inductance and a load model with bypass capacitance, DC load, and stepped loads.

 Figure 1: Simple P-SPICE model aids in system design

First you need to decide whether to treat the power supply and load as separate black boxes, or approach the problem as a complete power system design. If a system level approach, you can take advantage of the load bypass capacitance to reduce the power supply output capacitance, saving system cost. If a black box approach, you can test the supply and load separately. Either way, you need to determine how much bypassing capacitance is needed at the load.

First estimate the interconnect inductance and resistance between the power supply and load. This interconnect impedance (LINTERCONNECT) creates a low-pass filter with the bypass capacitor (CBYPASS). Leverage the assumption that the power supply output impedance is low. Use the characteristic impedance of this low-pass filter (ZO), magnitude of the load step (ISTEP), and allowable voltage variation (dV) to establish bypass filter requirements (Equations 1 and 2):

Solving Equation 2 for Z0, and substituting into Equation 1, gives Equation 3:

1 • 2 • 3

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