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AUTOSAR timing models reduce ECU risks

Posted: 16 Mar 2012     Print Version  Bookmark and Share

Keywords:AUTOSAR  electronic control unit  Timing analyses 

Besides the already mentioned opportunities (cycle times, execution times, priorities), there are further mechanisms available to reduce the data path/timing chain latency. The parameter "PositionInTask" determines the order in which the runnables are executed within a task. This parameter can become particularly important for data paths/timing chains in case two or more data path/timing chain runnables are placed within the same task. If for example a runnable, which is the last one to be executed within the task, writes data, which then is read by the first runnable within the task, a complete task cycle is "wasted". A better solution is to put the runnables in reverse order within the task. Such effects are displayed immediately through the data path/timing chain analysis. Afterwards, the schedule can be optimised manually or automatically.

The same procedure applies to task offsets. Offsets allow to delay task activation times. That way, load peaks as well as data path/timing chain latencies can be reduced further. For multi-core systems, individual cores can also be scheduled synchronously (using a common clock) or independently. Both approaches are supported by AUTOSAR as well as SymTA/S.

Consideration of the basic software
To this point, we have been focusing on timing analysis on the application level. In the next step, we are going to complement the existing timing model with basic software (BSW) elements as these do use CPU time as well, and thus may influence the present schedule. This is one purpose of the previously mentioned load reserve. The BSW focus is on independent tasks (for example TX-COM) or long-running interrupts (for example RX-CAN or crankshaft interrupts), as they have the biggest influence. Context-switch overheads need to be considered, too.

Having considered all these elements, the scheduling analysis provides us with more precise information on load, task schedule, and data path/timing chain latencies. After performing modifications as needed, the configuration (SW architecture, configuration of RTE and OS, BSW) is complete and can be adopted for software development and implementation with a minimised project risk.

Figure 4: Methodology process.

Methodology, process integration
Figure 4 shows a summary of the methodology. It can be used for new as well as existing systems. Applying the methodology provides a timing model at each step during the development of an ECU. For each integration step or product update, the timing impact of SW modifications can always be verified ?virtually" first, and optimised, if necessary. The presented methodology is fully compliant with the AUTOSAR standard. The tool SymTA/S automatically supports all mentioned phases.

As a result we obtain an optimised ECU configuration as well as a well-founded, quantifiable evaluation of the project?s feasibility. This evaluation is well-suited for communication and reasoning, especially with the project management, software suppliers, and OEM customers (e.g. through a requirements specification).The established timing models are ideal development artifacts for the exchange between different development groups and along the supply chain. The presented methodology minimises integration risks for ECU projects from the very beginning and constantly keeps real-time capabilities in focus.

About the authors
Christoph Ficek is Applications Engineer at Symtavision.

Dr. Kai Richter is Chief Technlogy Officer at Symtavision.

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