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FMCs vs PMCs/XMCs for harsh environments (Part 1)

Posted: 02 Feb 2012     Print Version  Bookmark and Share

Keywords:embedded computing  FPGAs  PMC  FPGA mezzanine card 

Interest in reconfigurable embedded computing in the defence and aerospace market has increased considerably as new generations of field-programmable gate arrays (FPGAs) present developers with a level of processing performance and potential input/output (I/O) bandwidth that cannot easily be matched by conventional CPU configurations. There are many commercial off-the-shelf (COTS) solutions that allow developers to readily make use of FPGAs for processing, but the real challenge to an application is often measured in terms of I/O bandwidth, latency and connectivity. Military electronic counter measures applications require high bandwidth data input, processing, and data output with minimum latency. The FPGA mezzanine card (FMC) directly addresses the challenges of FPGA I/O by solving the dual problem of how to maximise I/O bandwidth, while still being able to change the I/O functionality.

Darwin's theory of evolution doesn't necessarily apply to just the plant and animal world, as evidenced in the embedded computing industry, where only the fittest mezzanine card formats have survived. A wide variety have come and gone, with only the best formats gaining broad market appeal, with some specialising and excelling in niche areas. Others have been consigned to the drawing board of history. The reasons for this are many.

Perhaps the strongest mezzanine format for defence embedded computing is the peripheral component interconnect (PCI) mezzanine card (PMC)1, which uses the PCI and more recently the PCI-X bus2, and offers the higher levels of ruggedisation defined in the ANSI/VITA 20 standard3. PMC has succeeded because it has been able to evolve through speed improvements and environmental specifications. It has also been able to meet a wide range of market needs, including sufficient space to implement useful functionality. The latest incarnation of the standard is XMC4, which replaces the parallel PCI or PCI-X bus with a serial interface, of which the most common protocol supported is PCI Express5. These interfaces have evolved to address the needs of computer systems dominated by conventional processors, and the need for standard interfaces that abstract the specific details of their hosts.

For some applications, however, FPGAs provide the only practical way of achieving the necessary throughput, which could be beyond the capabilities of the existing mezzanine formats. PCI Express or PCI-X, for example, can introduce latencies on the order of a micro second or two. FPGAs can also be used to implement the necessary interfaces, so that the application can take advantage of the direct coupling of processing performance and I/O bandwidth. This applies very well to applications such as electronic counter measures, which can require latencies and bandwidth exceeding the theoretical capabilities of PCI Express (2 GB/s using a x8 interface for PCI Express, generation 1).

Figure 1: FPGA mezzanine cards (FMCs) leverage FPGA capabilities to provide a high-volume, flexible I/O solution.

FPGA mezzanine cards
FMC6 is aimed at solutions that require the benefits of an FPGA. The elegance of the FMC solution is in its simplicity. FMC modules feature only I/O devices such as analogue-to-digital converters (ADCs), digital-to-analogue converters (DACs), or transceivers. The modules have no on-board processors or bus interfaces, such as PCI-X. Instead, FMC modules take advantage of the intrinsic I/O capability of FPGAs to separate the physical I/O functionality on the module from the FPGA board design of the module's host, while maintaining direct connectivity between the FPGA and the I/O interface. Although aimed at I/O, FMC can be used for any function that might connect to an FPGA including digital signal processors, memory, or even another FPGA.

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