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Integrating core-based high-density FPGAs in your design

Posted: 09 Aug 2011     Print Version  Bookmark and Share

Keywords:FPGAs  Microprocessors  Q-switching 

Modern field programmable gate arrays (FPGAs) are quite useful for a wide range of high-speed, complex signal processing; however they can be difficult to interface to external systems. Microprocessors are great for interfacing to other systems, especially when equipped with Ethernet for communications, but don't offer the same levels of performance.

Until recently, designers either had to work around the weak spots of the chosen device or combine the two devices; the latter approach presents new difficulties when the data rate between the signal processing and general processor is significant. Enter FPGA devices with built-in microprocessors, combining modern 32bit microcontrollers and Ethernet media access controllers (MACs) with FPGA resources.

This article presents my experience with designing a nontrivial multi-processor system, using three networked Xilinx Virtex-4FX-based controllers.

Problem and solution
The system being developed by my client was a high-powered, pulsed laser for a military application. Unlike laser pointers, which are continuous wave (CW) lasers, this system consists of four pulsed lasers, using a technique called Q-switching to emit a series of regularly-spaced laser pulses; the output of these four lasers are ultimately combined optically for the final output.[1]

So, in addition to general housekeeping, the client identified a need early on for a number of high-speed photodiodes to monitor various aspects of the generated laser pulses. Ultimately, this evolved into an eight-channel pulse detection and analysis system operating at 200 million samples per second (Msps) for each channel. Clearly, no embedded processor system was going to be able to handle that throughput, so an FPGA-based solution was envisioned.

At the same time, other requirements, such as a relatively large number of sensors (more than 200), a good number of actuators, and unique command and telemetry interface with an external host system for overall control and monitoring, argued strongly for a microprocessor-based solution.

The initial thought was to combine an FPGA with a microprocessor, but because it appeared the interface between the two would, in itself, provide a challenge, I decided to investigate the then-new Virtex-4FX devices (this was in the fall of 2005). In addition to the high-performance logic and memory resources expected in a modern FPGA, these devices incorporate several "hard IP" resources, specifically PowerPC 32bit microprocessors and Ethernet MACs.

These hard IP (IP stands originally for intellectual property but is also used to identify a module that may be incorporated into an FPGA design, similar to a peripheral chip in a microprocessor board of old) augmented by a wide range of peripheral IP (such as interrupt controllers, serial ports, serial peripheral interfaces, memory controllers) provide the basis for a complete microprocessor system on a chip, with the benefit of supporting high-speed interfaces to custom logic entities.

Hardware design
The approach we took during the design of this system was to first partition the required functionality into two separate processing elements because the overall system design divided the system into a laser assembly and a supporting electronics rack (figure 1). The laser assembly contains the four laser resonators, optics, Q-switches, and the high-speed photodiode diagnostic sensors, and had to conform to strict physical interfaces.

Because of several high-level decisions, the design of the laser assembly was further partitioned into two identical halves, each implementing two of the four lasers; therefore, the laser electronics also consists of two identical assemblies. The supporting rack fills a standard 19-inch electronics rack, and contains power converters, Q-switch drivers, eight high-power laser pump diodes and their drivers, host interfaces, and the master processor.

So, due to our high-level requirements (the laser assembly and support rack approach) and the resulting system design, the electronics design evolved into a multi-processor solution, with three processors networked together to satisfy the functionality demanded.

To keep the development effort manageable, the three processor assemblies utilise a common "digital board," each augmented with different analogue boards; of course, the two laser processors used the same analogue board design.

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Figure 1: A system block diagram.

Here is the first instance where the flexibility of the Virtex-4FX devices paid real benefits; because the two analogue board designs required different mixes of analogue-to-digital (A/D) and digital-to-analogue (D/A) converters, as well as various other digital I/O interfaces, it would have been difficult to meet both sets of I/O without significant waste.

However, by putting the actual interface circuits (such as photodiode circuitry, A/D converters, serial line drivers) onto the custom analogue board, the interconnection between the two boards consists largely of direct FPGA I/O connections; hence, a different configuration, with the appropriate IP peripherals, allowed the same processor board to implement different functionality.

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