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IBM demos 100x faster phase-change memory tech

Posted: 05 Jul 2011     Print Version  Bookmark and Share

Keywords:phase-change memory  memory applications  non-volatile memory 

In addition, depending on the voltage, more or less material between the electrodes will undergo a phase change, which directly affects the cell's resistance. Scientists exploit that aspect to store not only one bit, but also multiple bits per cell. In the present work, IBM scientists used four distinct resistance levels to store the bit combinations "00," "01," "10" and "11."

To achieve the demonstrated reliability, crucial technical advancements in the "read" and "write" process were necessary. The scientists implemented an iterative "write" process to overcome deviations in the resistance due to inherent variability in the memory cells and the phase-change materials. "We apply a voltage pulse based on the deviation from the desired level and then measure the resistance. If the desired level of resistance is not achieved, we apply another voltage pulse and measure again—until we achieve the exact level," explained Pozidis.

Despite using the iterative process, the scientists achieved a worst-case write latency of about 10µs, which represents a 100x performance increase over even the most advanced flash memory on the market today.

For demonstrating reliable read-out of data bits, the scientists needed to tackle the problem of resistance drift. Because of structural relaxation of the atoms in the amorphous state, the resistance increases over time after the phase change, eventually causing errors in the read-out. To overcome the issue, the IBM scientists applied an advanced modulation coding technique that is inherently drift-tolerant. The modulation coding technique is because, on average, the relative order of programmed cells with different resistance levels does not change due to drift.

Using that technique, IBM scientists were able to mitigate drift and demonstrate long- term retention of bits stored in a sub-array of 200,000 cells of their PCM test chip, fabricated in 90nm CMOS technology.

The PCM test chip was designed and fabricated by scientists and engineers located in Burlington, Vermont; Yorktown Heights, New York and in Zurich. This retention experiment has been under way for more than five months, indicating that multi-bit PCM can achieve a level of reliability that is suitable for practical applications.

The PCM research project at IBM Research–Zurich will continue to be studied at the recently opened Binnig and Rohrer Nanotechnology Centre. The centre is jointly operated by IBM and ETH Zurich as part of a strategic partnership in nanosciences.

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