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AMD describes Fusion Architecture roadmap

Posted: 17 Jun 2011     Print Version  Bookmark and Share

Keywords:Fusion Architecture  FSA  APU 

AMD detailed the roadmap for its Fusion System Architecture (FSA) for Accelerated Processing Unit (APUs) and PC platforms to more than 700 developers and PC industry executives at the AMD Fusion Developer Summit.

FSA describes AMD's overarching design for having combinations of CPU and GPU processor cores operate as a unified processing engine that is both higher performance and much lower power than previous architectures aimed at improving future computing experiences.

According to AMD, many of the specific FSA enhancements discussed will be leveraged by newer programming languages, and interfaces like Open CL and Direct Compute, making it easier for the software developer to fully exploit the unique capabilities of the AMD Accelerated Processing Unit (APU).

"The first APUs from AMD dramatically increase processing performance while consuming less power, and now we are building upon that achievement with our next generation of products," said Phil Rogers, AMD Corporate Fellow. "Future innovations are intended to make the different processor cores more transparent to programmers. They can then seamlessly tap into the gigaflops of power efficient performance available on the APU and design even faster, more visually stunning applications on a wide range of form factors."

Available since January of this year, AMD says its line-up of APUs is the first to integrate x86 CPU cores and DirectX 11 capable Radeon GPU cores on a single die and have been widely adopted by computing OEMs worldwide. Being on the same chip reduces the system power and bill of materials, speeds the flow of data between the CPU and GPU through shared memory, and allows the GPU to function as both a graphics engine and an application accelerator in highly efficient compute platforms.

Building on the success of the integration of CPU and GPU processing cores on the same chip, AMD is now focused on evolving the architecture to make it appear as a unified processing element to the software programmer.

Some more evolutionary steps expected to continue through 2014 include support for C++ features that more fully leverage the GPU as a parallel processor; user mode scheduling for lower latency task dispatch between CPUs and GPUs; as well as unified memory address space and fully coherent memory shared by the CPU and CPU so they operate seamlessly together.

AMD also announced plans to publish a detailed specification on the features and functionality required to meet the requirements of the architecture.

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