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Perform debug for antenna issues in copper processes

Posted: 16 May 2011     Print Version  Bookmark and Share

Keywords:design rule checking  debugging 

The antenna effect in IC designs has long been recognised, but an effective solution has been a little more elusive. Unlike most traditional design rule checking (DRC) errors, antennae issues are identified based on multiple layer interactions, which in turn are based upon an implied electrical connectivity at various stages in the manufacturing cycle. While the typical antenna failure is a transistor gate in danger of being shorted or burnt, the problems actually arise from metal or via interconnects that are potentially far away from the transistor in question. As a result, debugging for antenna issues is non-trivial, and requires extensive information about the design.

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