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MPUs target high-bandwidth network apps

Posted: 16 May 2011     Print Version  Bookmark and Share

Keywords:microprocessor  mpu  TILE-Gx 8000 

Tilera Corp. debuts the TILE-Gx 8000 series of microprocessors that are available in four configurations with 16, 36, 64 or 100 cores while including extensive I/O ports, packet processing and network acceleration features aimed at networking applications requiring high bandwidth and throughput.

Each device is optimised for the highest demand networking applications, including intrusion prevention and detection (IPS/IDS), unified threat management (UTM), firewall, virtual private network (VPN), WAN optimiser, network monitoring, network forensics, test equipment, data leakage protection (DLP) and e-Discovery.

In addition to the TILE-Gx 8000 series, there will be two other series in the TILE-Gx family. The TILE-Gx 5000 series will be optimised for multimedia applications and the TILE-Gx 3000 series will target cloud server applications. Details on these series will be announced in late Q2.

The Tile-Gx 8000 series, developed using the 40nm TSMC fabrication process, can deliver up to 80Gbps of packet processing with an extraordinary 450 billion operations-per-second on a single processor. With a range of compute from 16�100 cores on a single die, the TILE-Gx claims to be the most scalable processor family on the market. System designers can satisfy the compute needs from the very top to the low end of their product line with a software-compatible series of TILE-Gx processors.

The Tile-Gx 8000 series offers an array of powerful three-issue, 64bit cores with an advanced virtual memory system. Each core includes 32KB of L1 I-cache, 32KB of L1 D-cache and 256KB L2 cache, with up to 32MB L3 coherent cache across the device. Maximum processor utilisation is ensured with advanced memory stripping that utilises up to four integrated 72bit DDR3 memory controllers that support up to one terabyte total capacity.

The on-chip Multistream iMesh Crypto Accelerator (MiCA) system delivers up to 80Gbps encryption and 20Gbps full-duplex compression processing, tightly coupled to Tilera's breakthrough iMesh for extremely low latency and wire-speed small packet throughput. In addition, a high-performance true random number generator and public key accelerator enable up to 60,000 RSA handshakes per second. The Tile-Gx 8000 series also includes the mPIPE (multicore Programmable Intelligent Packet Engine) system for wire-speed packet classification, load balancing and buffer management. This flexible, C-programmable engine delivers 80Gbps and 120 million packets-per-second of throughput for handling multiple layers of packet encapsulation.

The 36-core TILE-Gx devices will begin sampling in July and the 16-core versions in August.





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