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Uncertainty clouds advanced lithography

Posted: 21 Jul 2010     Print Version  Bookmark and Share

Keywords:lithography  Semicon West 

As with a royal succession, uncertainty in the roadmap for advanced lithography threatens the future with cost, chaos, and bloodshed. But despite brave pronouncements by vendors and users, it appeared that the industry was bracing for the worst: beset users buckled down for a hard time, and unlikely claimants marshalled their forces to press for a spot on the throne

Gregg Bartlett, GlobalFoundries Inc.'s senior VP of technology and R&D, planted a brave banner on the field with his keynote, saying that the company would install a production-grade EUV lithography tool in 2012, and actually use it in production by perhaps 2014.

But much of the industry remains deeply sceptical. Symptoms of the uncertainly were visible in an afternoon session on advanced lithography.

Jongwook Kye, principal member of technical staff at GlobalFoundries, filled in some of the concerns that might have been obscured by Bartlett's flag-planting. Kye pointed out that lithographers were already working at numerical apertures far higher, and a k1 far lower, than were thought feasible a few years ago.

Even so, random patterns were nearly impossible to print. And lithographers are running out of options. Kye warned that the full cost of double-patterning was growing so high that EUV—should it's vastly expensive machines ever be available—was looking like a low-cost alternative. Still, he said, spacer-defined double patterning would probably be necessary on some critical—and sufficiently regular—layers.

But in general, Kye argued, there are no magic fixes. The way forward will be increasingly complex 193-nm lithography, made possible by unprecedented cooperation between technology and design teams.

"In the past, the link between technology developers and chip designers was only the process design kit," Kye said. "Now that is not enough. The two groups must sit together."

Technology teams must tell designers what features can actually be printed, Kye said. And designers must deliver layers that use only feasible patterns. In exchange, the technology team can deliver useful yields and improved performance, without having to wait for the end of the EUV rainbow, he said.

A starkly different view came from a purveyor of a technology that few semiconductor designers have been watching: nano-imprint. Ben Eynon, VP of semiconductor business development at imprint equipment vendor Molecular Imprints Inc. (MII), argued that for NAND flash production at leading-edge geometries, his company's systems would soon be the best available choice.

Eynon cited calculations done at Toshiba suggesting that at an advanced process node the total cost of ownership for imprint would be half that of EUV, and a quarter that of double patterning. Those numbers depend on availability of a mask replicator, an imprinting device that creates many working imprint masks from one e-beam-written master.

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