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Dynamic current profiling

Posted: 08 Jul 2010     Print Version  Bookmark and Share

Keywords:dynamic current profiling  embedded power needs  embedded design 

If you are designing with embedded systems, you face various power optimization and power characterization hurdles throughout your design process. You know what you want to output, simulate, and measure—but you need a whole "toolbox" of instruments and hardware to do the job. Not only is this toolbox costly, but properly configuring the hardware and software into an accurate, dependable solution can be time-consuming.

The power challenges that embedded system designer's face can be broken into three categories: properly powering on and off multiple power inputs, characterizing power needs under dynamic load conditions, and simulating real-world power conditions. This application note focuses on characterizing the power needs of an embedded design under dynamic load conditions. We will explore why it is critical to fully characterize a dynamic load for minimizing power usage and increasing battery life. Then we will introduce you to a single, easy-to-use instrument that can supply and characterize the dynamic power needs of your embedded design.

Rapid advances in semiconductor technology and portable device technology have led to an explosion in the development of low-power embedded systems that conserve battery life. In battery-powered devices, power is limited, which leaves you at the mercy of available power when you try to decide what features to include, what size your device should be and at what speed it should operate. Because of the power challenges battery-powered devices present, it is becoming critical that you optimize the hardware and software of your design for minimum power usage.

To conserve power, many embedded applications have turned to dynamic power usage models. Dynamic power usage models have an ever-changing current profile, which is caused by the various power-saving steps that are being taken dynamically during the embedded system's operation. These power-saving steps may include putting components in sleep or idle mode when they are not being used, slowing the system clock during certain stages of operation and trying various hardware and firmware methods to optimize a task for power efficiency. As the designer, you need to figure out the most accurate and fastest way to characterize and analyze an embedded design's current profile so you can optimize your design to achieve lower power consumption and longer battery life.

View the PDF document for more information.

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