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EE Times-India > EDA/IP

Synopsys bags high-level synthesis tech

Posted: 16 Jun 2010     Print Version  Bookmark and Share

Keywords:high-level synthesis  C/C++  FPGA-based 

In a move that strengthens its position in system-level design and verification and enhances the company's FPGA-based prototyping solutions, Synospys, Inc. has acquired technology of Synfora, Inc., a provider of C/C++ high-level synthesis tools used to design complex systems-on-chips (SoCs) and FPGAs. Synopsys has also acquired engineering resources and assets of the company. The terms of the deal, which closed today, have not been disclosed.

Synfora's technology enables designers to quickly create and synthesise IC building blocks starting from a description written in the C or C++ programming language. The advantages of Synfora's technology, including high capacity and quality of results for performance, area and power, are production-proven in leading-edge designs. Customers who have adopted Synfora's tools have experienced the benefits of the technology for their FPGA and SoC designs through integration with Synopsys' Synplify Premier synthesis and Galaxy Implementation Platform.

"This acquisition adds proven C/C++ high-level synthesis technology to our system-level solutions portfolio and broadens Synopsys' comprehensive solutions for block creation and optimisation," said Joachim Kunkel, senior vice president and general manager of the Solutions Group at Synopsys. "It underscores Synopsys' clear commitment to being the leading EDA supplier of system-level solutions for SoC design, software development, hardware/software integration and system validation."

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