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On-chip debug system packs trace element

Posted: 05 May 2010     Print Version  Bookmark and Share

Keywords:debug system  trace feature  memory controller  microcontroller 

ARM Holdings plc has added trace macrocell and trace memory controller features to its Coresight on-chip debug system. The System Trace Macrocell (STM) extends to all software developers, in particular application and kernel developers, real-time visibility of software and hardware execution enabling a hardware-assisted instrumentation debug capability.

STM builds upon the success of instrumentation trace, which has been widely adopted in the microcontroller market and supported by Keil tools, and provides software developers with the means of tuning software for both robustness and faster execution on ARM processor-based systems.

The Trace Memory Controller (TMC) eliminates the need for dedicated trace interfaces and enables the SoC designer to use existing system memory to collect trace information. Real-time on-chip visibility is made available to all developers, including OEM third-party software developers, enabling use of real-time trace information right up to the point of mass production.

ARM worked with a number of leading OEM Partners and the Mobile Industry Processor Interface (MIPI) Alliance Inc. to define the system trace technology.

"As the complexity and performance of mobile devices increases, test and debug is a crucial activity for the MIPI Alliance. ARM leadership in debug and trace is a key asset for MIPI," said Joel Huloux, chairman of MIPI Alliance, in a statement issued by ARM. "By providing System Trace IP that is designed to comply with the MIPI specifications ARM will make System Trace a de-facto standard across industries."

The ARM CoreSight STM and Trace Memory Controller are available for licensing now. Tool support by ARM is planned for 2H 10.

- Peter Clarke
EE Times

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