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Using reference designs in implementing low, high frequency ADCs

Posted: 08 Apr 2010     Print Version  Bookmark and Share

Keywords:high frequency ADC  reference design  FPGA CPLD 

Designers of digital systems are familiar with implementing the "leftovers" of their digital design by using FPGAs and CPLDs to glue together various processors, memories and standard function components on their PCB. In addition to these digital functions, FPGAs and CPLDs can also implement common analog functions using an LVDS input, a simple resistor capacitor (RC) circuit and some FPGA or CPLD digital logic elements to create an ADC.

The ADC is a common analog building block and almost always is needed when interfacing digital logic, like that in an FPGA or CPLD, to the "real world" of analog sensors. This article explains the implementation of both a low frequency (DC to 1kHz) and higher frequency (up to 50kHz) ADC using reference designs and demo boards available from Lattice Semiconductor. A sample application for each design—one for a system monitor in a network switch and another for frequency detection in an audio communication system—is examined.

View the PDF document for more information.

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